參數(shù)資料
型號(hào): CDB4221
廠(chǎng)商: Cirrus Logic, Inc.
元件分類(lèi): Codec
英文描述: 24-Bit Stereo Audio Codec with 3V Interface
中文描述: 24位立體聲音頻編解碼器接口為3V
文件頁(yè)數(shù): 3/32頁(yè)
文件大?。?/td> 770K
代理商: CDB4221
CS4220 CS4221
DS284PP3
3
5.7.1 Master Clock Control (MCK) .................................................................................. 17
6. PIN DESCRIPTIONS — CS4220 ............................................................................................ 18
7. PIN DESCRIPTIONS — CS4221 ............................................................................................ 20
8. APPLICATIONS ..................................................................................................................... 22
8.1 Overview .......................................................................................................................... 22
8.2 Grounding and Power Supply Decoupling ....................................................................... 22
8.3 High Pass Filter ............................................................................................................... 22
8.4 Analog Outputs ................................................................................................................ 22
8.5 Master vs. Slave Mode .................................................................................................... 22
8.6 De-emphasis ................................................................................................................... 22
8.7 Power-up / Reset / Power Down Calibration ................................................................... 22
8.8 Control Port Interface (CS4221 only) .............................................................................. 23
8.8.1 SPI Mode ............................................................................................................ 23
8.8.2 I
2
C Mode ............................................................................................................. 23
8.9 Memory Address Pointer (MAP) ...................................................................................... 24
8.9.1 Auto-Increment Control (INCR) .............................................................................. 24
8.9.2 Register Pointer (MAP) .......................................................................................... 24
9. ADC/DAC FILTER RESPONSE ............................................................................................. 28
10. PARAMETER DEFINITIONS ................................................................................................ 29
11. PACKAGE DIMENSIONS .................................................................................................... 30
LIST OF FIGURES
Figure 1. Serial Audio Port Data I/O Timing .................................................................................. 7
Figure 2. SPI Control Port Timing ................................................................................................. 8
Figure 3. I
2
C Control Port Timing .................................................................................................. 9
Figure 4. CS4220 Recommended Connection Diagram ............................................................. 10
Figure 5. CS4221 Recommended Connection Diagram ............................................................. 11
Figure 6. Control Port Timing, SPI mode .................................................................................... 24
Figure 7. Control Port Timing, I
2
C mode ..................................................................................... 24
Figure 8. Serial Audio Format 0 (I2S) ......................................................................................... 25
Figure 9. Serial Audio Format 1 .................................................................................................. 25
Figure 10. Serial Audio Format 2 ................................................................................................ 25
Figure 11. Serial Audio Format 3 ................................................................................................ 26
Figure 12. Optional Input Buffer .................................................................................................. 26
Figure 13. Single-ended Input Application .................................................................................. 26
Figure 14. 2- and 3-Pole Butterworth Filters ............................................................................... 27
Figure 15. Hybrid Digital/Analog Attenuation .............................................................................. 27
Figure 16. De-emphasis Curve ................................................................................................... 27
Figure 17. Hybrid Analog/Digital Attenuation .............................................................................. 27
Figure 18. ADC Filter Response ................................................................................................. 28
Figure 19. ADC Passband Ripple ............................................................................................... 28
Figure 20. ADC Transition Band ................................................................................................. 28
Figure 21. DAC Filter Response ................................................................................................. 28
Figure 22. DAC Passband Ripple ............................................................................................... 28
Figure 23. DAC Transition Band ................................................................................................. 28
LIST OF TABLES
Table 1. Example Volume Settings............................................................................................... 15
Table 2. Common Clock Frequencies........................................................................................... 18
Table 3. Digital Interface Format - DIF1 and DIF0....................................................................... 19
Table 4. De-emphasis Control ...................................................................................................... 19
Table 5. Common Clock Frequencies........................................................................................... 20
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CDB4222 制造商:CIRRUS 制造商全稱(chēng):Cirrus Logic 功能描述:20-Bit Stereo Audio Codec with Volume Control
CDB4223 制造商:CIRRUS 制造商全稱(chēng):Cirrus Logic 功能描述:24-Bit 105 dB Audio Codec with Volume Control
CDB4224 制造商:CIRRUS 制造商全稱(chēng):Cirrus Logic 功能描述:24-Bit 105 dB Audio Codec with Volume Control
CDB4225 制造商:CIRRUS 制造商全稱(chēng):Cirrus Logic 功能描述:Digital Audio Conversion System
CDB4226 制造商:CIRRUS 制造商全稱(chēng):Cirrus Logic 功能描述:Surround Sound Codec