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參數(shù)資料
| 型號(hào)： | CDB4216 |
| 廠商： | Cirrus Logic, Inc. |
| 元件分類： | Codec |
| 英文描述： | 16-Bit Stereo Audio Codec |
| 中文描述： | 16位立體聲音頻編解碼器 |
| 文件頁數(shù)： | 19/58頁 |
| 文件大?。?/td> | 799K |
| 代理商： | CDB4216 |
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SERIAL MODE 4, SM4
Serial mode 4 is enabled by setting
SMODE3 = 1. Both Master and Slave sub-
modes are available and are selected by setting
the SMODE2 and SMODE1 pins as shown in
Table 6. In Master sub-mode, the phase relation-
ship between SCLK/SSYNC and CLKIN is
controlled to minimize digital noise coupling
into the analog section. Therefore, Master sub-
mode may yield slightly better noise
performance than Slave sub-mode. In Slave sub-
mode, SCLK and SSYNC must be synchronous
to the master clock.
In serial mode 4, SM4, the CLKIN frequency
must be 256 times the highest sample frequency
needed. Also, SM4 has five attenuation bits for
each D/A output channel. SM4 differs from SM3
in that SM4 splits the audio data from the con-
trol data with the control data input on an
independent serial port. This reduces the audio
serial bus bandwidth in half, providing an easier
interface to low-cost DSPs. The audio serial port
sub-frame is illustrated in Figure 13 for SM4.
Interrupt Pin - MF5:INT
Serial Mode 4 also defines the multifunction pin
MF5:INT as an open-collector interrupt pin. In
SM4, this pin requires a pullup resistor and will
go low when the ADV bit or DI1 pin change, or
a rising edge on the LCL or RCL bits, or by
exiting an SCLK out of range condition (Er-
ror = 3). The interrupt may be masked by setting
the MSK bit in the control serial data port.
Sub-frame 1
FRAME (n+1)
Word A
Word B
Sub-frame 1
Word A
Word B
FRAME n
64 SCLK Periods
FRAME (n+2)
Sub-frame 1
Word A
Word B
FRAME (n+3)
Sub-frame 1
Word A
Word B
SSYNC
DATA
SFS2
SFS1
frame
0
0
1
MF8:
MF7:
Sub-
Figure 10. SM3-Slave - 64 BPF; MF1:F1, MF2:F2 = 00
Sub-frame 1
Sub-frame 2
FRAME (n+1)
Word A
Word B
Word A
Word B
Sub-frame 1
Word A
Word B
FRAME n
128 SCLK Periods
Sub-frame 2
Word A
Word B
FRAME (n+2)
Sub-frame 1
Word A
Word B
SSYNC
DATA
SFS2
SFS1
frame
0
0
0
1
1
2
MF8:
MF7:
Sub-
Figure 11. SM3-Slave - 128 BPF; MF1:F1, MF2:F2 = 01
Sub-frame 1
Sub-frame 2
Sub-frame 3
Sub-frame 4
FRAME (n+1)
Word A
Word B
Word A
Word B
Word A
Word B
Word A
Word B
FRAME n
256 SCLK Periods
Sub-frame 1
Word A
Word B
SSYNC
DATA
SFS2
SFS1 frame
0
0
1
1
0
1
0
1
1
2
3
4
MF8:
MF7:
Sub-
Figure 12. SM3-Slave - 256 BPF; MF1:F1, MF2:F2 = 10
CS4216
DS83F2
19
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CDB4220 | 24-Bit Stereo Audio Codec with 3V Interface |
| CDB4221 | 24-Bit Stereo Audio Codec with 3V Interface |
| CDB4222 | 20-Bit Stereo Audio Codec with Volume Control |
| CDB4224 | 24-Bit 105 dB Audio Codec with Volume Control |
| CDB4223 | 24-Bit 105 dB Audio Codec with Volume Control |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CDB4220 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit Stereo Audio Codec with 3V Interface |
| CDB4221 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit Stereo Audio Codec with 3V Interface |
| CDB4222 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:20-Bit Stereo Audio Codec with Volume Control |
| CDB4223 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit 105 dB Audio Codec with Volume Control |
| CDB4224 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:24-Bit 105 dB Audio Codec with Volume Control |
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