- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379828 > CDB391A (Cirrus Logic, Inc.) 24-BIT, 192 kHz STEREO DAC WITH VOLUME CONTROL PDF資料下載
參數(shù)資料
| 型號： | CDB391A |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | 24-BIT, 192 kHz STEREO DAC WITH VOLUME CONTROL |
| 中文描述： | 24位192千赫立體聲DAC控制音量 |
| 文件頁數(shù)： | 22/40頁 |
| 文件大?。?/td> | 748K |
| 代理商： | CDB391A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁當前第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
CS4391A
22
DS600PP3
5.
PIN DESCRIPTION - PCM DATA MODE
Reset - RST
Pin 1, Input
Function:
Hardware Mode: The device enters a low power mode and the internal state machine is reset to the de-
fault setting when low. When high, the device becomes operational.
Control Port Mode: The device enters a low power mode and all internal registers are reset to the default
settings, including the control port, when low. When high, the control port becomes operational and the
PDN bit must be cleared before normal operation will occur. The control port can not be accessed when
reset is low. The Control Port Enable Bit must also be enabled after a device reset.
RST is required to remain low until the power supplies and clocks are applied and stable.
Interface Power - VL
Pin 2, Input
Function:
Digital interface power supply. The voltage on this pin determines the logic level high threshold for the
digital inputs.
Serial Audio Data - SDATA
Pin 3, Input
Function:
Two's complement MSB-first serial data is input on this pin. The data is clocked into SDATA via the serial
clock and the channel is determined by the Left/Right clock. The required relationship between the
Left/Right clock, serial clock and serial data is defined by the Mode Control Byte in Control Port Mode or
the Mode Pins in Hardware Mode. The options are detailed in Figures 7-24.
Reset
RST
VL
AMUTEC
AOUTA-
AOUTA+
VA
AGND
AOUTB+
AOUTB-
BMUTEC
CMOUT
FILT+
Channel A Mute Control
Differential Output
Differential Output
Analog Power
Analog Ground
Differential Output
Differential Output
Channel B Mute Control
Common Mode Voltage
Positive Voltage Reference
Logic Voltage
Serial Data
Serial Clock
Left/Right Clock
Master Clock
See Description
See Description (
SCL/CCLK) M2
See Description (
SDA/CDIN) M1
See Description
SDATA
SCLK
LRCK
MCLK
M3
(
AD0/CS) M0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
相關PDF資料 |
PDF描述 |
|---|---|
| CDB4215 | 16-Bit Multimedia Audio Codec |
| CDB4216 | 16-Bit Stereo Audio Codec |
| CDB4220 | 24-Bit Stereo Audio Codec with 3V Interface |
| CDB4221 | 24-Bit Stereo Audio Codec with 3V Interface |
| CDB4222 | 20-Bit Stereo Audio Codec with Volume Control |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CDB3S-A-L | 制造商:Panduit Corp 功能描述: |
| CDB4.4101.151 | 制造商:Schurter Electronic Components 功能描述: |
| CDB4/1 | 功能描述:DIN導軌式接線端子 Distribution Block, Center In4 out, 35/50A, 600V, Gray RoHS:否 制造商:Phoenix Contact 類型:Feed Through Modular Terminal Block 位置/觸點數(shù)量:1 線規(guī)量程:26-14 電流額定值:5 A, 15 A 電壓額定值:300 V, 600 V 安裝風格: 端接類型:Push-In |
| CDB4/10(1) | 功能描述:接線端子板接口模塊 Distribution Block Side Input RoHS:否 制造商:Phoenix Contact 類型:Isolating Amplifier 節(jié)距: 位置/觸點數(shù)量:2 線規(guī)量程: 電流額定值: 電壓額定值:24 V 安裝風格:DIN Rail 安裝角: 端接類型:Screw 觸點電鍍: |
| CDB4/11(1) | 功能描述:DIN導軌式接線端子 RoHS:否 制造商:Phoenix Contact 類型:Feed Through Modular Terminal Block 位置/觸點數(shù)量:1 線規(guī)量程:26-14 電流額定值:5 A, 15 A 電壓額定值:300 V, 600 V 安裝風格: 端接類型:Push-In |
發(fā)布緊急采購，3分鐘左右您將得到回復。