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參數(shù)資料
| 型號： | CD82C88 |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | CMOS Bus Controller |
| 中文描述： | 8 MHz, CONTROL AND CMD SIG GEN, CDIP20 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大小： | 129K |
| 代理商： | CD82C88 |
4-338
AC Testing Input, Output Waveform
A.C. Testing: All input signals (other than CLK) must switch
between V
IL
-0.4V and V
IH
+0.4. CLK must switch between 0.4V
and V
CC
-0.4V. Input rise and fall times are driven at 1ns/V.
A.C. Test Circuit
AC Electrical Specifications
V
CC
= 5.0V
±
10%;
T
A
= 0
o
C to +70
o
C (C82C88);
T
A
= -40
o
C to +85
o
C (I82C88);
T
A
= -55
o
C to +125
o
C (M82C88)
SYMBOL
TIMING REQUIREMENTS
(1) TCLCL
(2) TCLCH
(3) TCHCL
(4) TSVCH
(5) TCHSV
(6) TSHCL
(7) TCLSH
TIMING RESPONSES
(8) TCVNV
(9) TCVNX
(10) TCLLH
(11) TCLMCH
(12) TSVLH
(13) TSVMCH
(14) TCHLL
(15) TCLML
(16) TCLMH
(17) TCHDTL
(18) TCHDTH
(19) TAELCH
(20) TAEHCZ
PARAMETER
8MHz
10MHz
12MHz
UNITS
TEST
CONDITIONS
MIN
MAX
MIN
MAX
MIN
MAX
CLK Cycle Period
CLK Low Time
CLK High Time
Status Active Setup Time
Status Inactive Hold Time
Status Inactive Setup Time
Status Active Hold Time
125
55
40
35
10
35
10
-
-
-
-
-
-
-
100
50
37
35
10
35
10
-
-
-
-
-
-
-
83
34
34
35
5
35
5
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
Control Active Delay
Control Inactive Delay
ALE Active Delay (from CLK)
MCE Active Delay (from CLK)
ALE Active Delay (from Status)
MCE Active Delay (from Status)
ALE Inactive Delay
Command Active Delay
Command Inactive Delay
Direction Control Active Delay
Direction Control Inactive Delay
Command Enable Time (Note 1)
Command Disable Time
(Note 2)
Enable Delay Time
AEN to DEN
CEN to DEN, PDEN
CEN to Command
5
45
45
20
25
20
30
18
35
35
50
30
40
40
5
45
45
20
23
20
23
18
35
35
50
30
40
40
5
45
35
20
23
20
23
18
35
35
50
30
40
40
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
1
1
1
1
1
2
2
1
1
3
4
10
-
-
-
-
4
5
5
-
-
-
-
10
-
-
-
-
4
5
5
-
-
-
-
10
-
-
-
-
4
5
5
-
-
-
-
(21) TAELCV
(22) TAEVNV
(23) TCEVNV
(24) TCELRH
110
-
-
-
250
25
25
TCLML
+10
-
110
-
-
-
250
25
25
TCLML
110
-
-
-
250
25
25
TCLML
ns
ns
ns
ns
2
1
1
2
(25) TLHLL
ALE High Time
TCLCH -
10
TCLCH -
10
-
TCLCH -
10
n
ns
1
NOTES:
1. TAELCH measurement is between 1.5V and 2.5V.
2. TAEHCZ measured at 0.5V change in VOUT.
1.5V
1.5V
V
IL
-0.4V
INPUT
V
IH
+0.4V
V
OL
OUTPUT
V
OH
TABLE 2. TEST CONDITION DEFINITION TABLE
TEST CONDITION
1
2.13V
2
2.29V
3
1.5V
4
1.5V
V1
R1
220
91
187
187
C1
80pF
300pF
300pF
50pF
TEST
POINT
V1
C1 (SEE NOTE)
R1
OUTPUT FROM
DEVICE
UNDER TEST
NOTE:
INCLUDES STRAY AND JIG CAPACITANCE
82C88
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