參數(shù)資料
型號: BUK114-50L
廠商: NXP SEMICONDUCTORS
元件分類: 外設(shè)及接口
英文描述: Logic level TOPFET SMD version of BUK104-50L/S
中文描述: BUF OR INV BASED PRPHL DRVR
文件頁數(shù): 5/13頁
文件大小: 144K
代理商: BUK114-50L
Philips Semiconductors
Product specification
Logic level TOPFET
SMD version of BUK104-50L/S
BUK114-50L/S
INPUT CHARACTERISTICS
T
mb
= 25 C unless otherwise specified
SYMBOL
PARAMETER
Normal operation
V
IS(TO)
Input threshold voltage
CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DS
= 5 V; I
D
= 1 mA
1.0
0.5
-
11
1.5
-
10
13
2.0
-
100
-
V
V
nA
V
T
mb
= 150 C
I
IS
V
(CL)IS
Input current
Input clamp voltage
Overload protection latched
Input resistance
1
V
= 10 V
I
I
= 1 mA
R
ISL
V
PS
= 5 V
I
I
= 5 mA;
T
= 150 C
I
I
= 5 mA;
T
mb
= 150 C
-
-
-
-
55
95
35
60
-
-
-
-
V
PS
= 10 V
Application information
External input resistances for
internal overvoltage clamping
2
internal overload protection
3
(see figure 29)
R
I
=
;
R
IS
=
;
R
IS
R
I
V
DS
> 30 V
V
II
= 5 V
V
II
= 10 V
100
1
2
-
-
-
-
-
-
k
k
SWITCHING CHARACTERISTICS
T
mb
= 25 C; R
I
= 50
; R
IS
= 50
(see figure 29); resistive load R
L
= 10
. For waveforms see figure 28.
SYMBOL
PARAMETER
CONDITIONS
t
d on
Turn-on delay time
V
DD
= 15 V; V
IS
: 0 V
10 V
t
r
Rise time
t
d off
Turn-off delay time
V
DD
= 15 V; V
IS
: 10 V
0 V
t
f
Fall time
MIN.
-
-
-
-
TYP.
8
13
100
45
MAX.
-
-
-
-
UNIT
ns
ns
ns
ns
CAPACITANCES
T
mb
= 25 C; f = 1 MHz
SYMBOL
C
iss
C
oss
C
rss
C
pso
PARAMETER
Input capacitance
Output capacitance
Reverse transfer capacitance
Protection supply pin
capacitance
Flag pin capacitance
CONDITIONS
V
DS
= 25 V; V
IS
= 0 V
V
DS
= 25 V; V
IS
= 0 V
V
DS
= 25 V; V
IS
= 0 V
V
PS
= 10 V
MIN.
-
-
-
-
TYP.
415
275
55
30
MAX.
600
400
80
-
UNIT
pF
pF
pF
pF
C
fso
V
FS
= 10 V; V
PS
= 0 V
-
20
-
pF
1
The resistance of the internal transistor which discharges the power MOSFET gate capacitance when overload protection operates.
The external drive circuit should be such that the input voltage does not exceed V
IS(TO)
minimum when the overload protection has
operated. Refer also to figure for latched input characteristics.
2
Applications using a lower value for R
IS
would require external overvoltage protection.
3
For applications requiring a lower value for R
I
, an external overload protection strategy is possible using the flag pin to ‘tell’ the control circuit to
switch off the input.
September 1996
5
Rev 1.000
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