
34
AMD Geode SC1200/SC1201 Processor Data Book
Signal Definitions
Revision 7.1
ACK#
I
INT
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTDE
O
O1/4
PMR[15] = 0) and
(PMR[27] = 0 and
FPCI_MON = 0)
VOPCK
O
O1/4
PMR[15] = 1) and
(PMR[27] = 0 and
FPCI_MON = 0)
FPCICLK
O
O1/4
(PMR[27] = 1 or
FPCI_MON = 1)
U4
VCORE
PWR
---
U28
VCORE
PWR
---
MD33
I/O
INT,
TS2/5
VIO
---
U30
VSS
GND
---
MD32
I/O
INT,
TS2/5
VIO
---
PD4
I/O
INT,
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD10
O
O1/4
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD4
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
PD5
I/O
INT,
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD11
O
O1/4
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD5
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
PD6
I/O
INT,
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD1
O
O1/4
PMR[15] = 0) and
(PMR[27] = 0 and
FPCI_MON = 0
VOPD0
O
O1/4
PMR[15] = 1) and
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD6
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
V4
VSS
GND
---
V28
VSS
GND
---
MD36
I/O
INT,
TS2/5
VIO
---
MD35
I/O
INT,
TS2/5
VIO
---
MD34
I/O
INT,
TS2/5
VIO
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration
SLIN#/ASTRB#
O
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD16
O
O1/4
(PMR[27] = 0 and
FPCI_MON = 0)
F_IRDY#
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
PD3
I/O
INT,
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD9
O
O1/4
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD3
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
PD2
I/O
INT,
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD8
O
O1/4
PMR[15] = 0) and
(PMR[27] = 0 and
FPCI_MON = 0)
VOPD7
O
O1/4
PMR[15] = 1) and
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD2
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
W4
VCORE
PWR
---
W28
VCORE
PWR
---
MD39
I/O
INT,
TS2/5
VIO
---
MD38
I/O
INT,
TS2/5
VIO
---
MD37
I/O
INT,
TS2/5
VIO
---
PD1
I/O
INT,
O14/14
VIO
(PMR[27] = 0 and
FPCI_MON = 0)
TFTD7
O
O1/4
PMR[15] = 0) and
(PMR[27] = 0 and
FPCI_MON = 0)
VOPD6
O
O1/4
PMR[15] = 1) and
(PMR[27] = 0 and
FPCI_MON = 0)
F_AD1
O
O14/14
(PMR[27] = 1 or
FPCI_MON = 1)
Y2
VIO
PWR
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer1
Type
Power
Rail
Configuration