參數(shù)資料
型號: BS62LV256TC
廠商: BRILLIANCE SEMICONDUCTOR, INC.
英文描述: Very Low Power/Voltage CMOS SRAM 32K X 8 bit
中文描述: 非常低功率/電壓CMOS SRAM的32K的× 8位
文件頁數(shù): 4/11頁
文件大?。?/td> 331K
代理商: BS62LV256TC
Revision 2.2
April 2001
4
JEDEC
PARAMETER
NAME
t
AVAX
t
AVQV
t
ELQV
t
GLQV
t
ELQX
t
GLQX
t
EHQZ
t
GHQZ
t
AXOX
PARAMETER
NAME
DESCRIPTION
BS62LV256
MIN. TYP. MAX.
UNIT
t
RC
t
AA
t
ACS
t
OE
t
CLZ
t
OLZ
t
CHZ
t
OHZ
t
OH
Read Cycle Time
70
--
--
ns
Address Access Time
--
--
70
ns
Chip Select Access Time
--
--
70
ns
Output Enable to Output Valid
--
--
50
ns
Chip Select to Output Low Z
10
--
--
ns
Output Enable to Output in Low Z
10
--
--
ns
Chip Deselect to Output in High Z
0
--
35
ns
Output Disable to Output in High Z
0
--
30
ns
Output Disable to Output Address Change
10
--
--
ns
Input Pulse Levels
Input Rise and Fall Times
Input and Output
Timing Reference Level
Vcc/0V
5ns
0.5Vcc
AC ELECTRICAL CHARACTERISTICS
( TA =0
o
C to + 70
o
C and Vcc=3.0V)
READ CYCLE
AC TEST CONDITIONS
AC TEST LOADS AND WAVEFORMS
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
MAY CHANGE
FROM H TO L
DON T CAR
ANY CHANG
PERMITTED
E:
E
CHANGE :
STATE
UNKNOWN
DOES NOT
APPLY
MUST BE
STEADY
WILL BE
CHANGE
FROM H TO L
CENTER
LINE IS HIGH
IMPEDANCE
”O(jiān)FF ”STATE
MAY CHANGE
FROM L TO H
WILL BE
CHANGE
FROM L TO H
BSI
BS62LV256
R0201-BS62LV256
667
THEVENIN EQUIVALENT
ALL INPUT PULSES
10%
90%
Vcc
GND
5ns
90%
10%
1.73V
OUTPUT
FIGURE 2
3.3V
OUTPUT
INCLUDING
JIG AND
SCOPE
1269
1404
5PF
FIGURE 1B
3.3V
INCLUDING
JIG AND
SCOPE
1269
100PF
FIGURE 1A
1404
OUTPUT
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