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參數(shù)資料
| 型號(hào)： | BS62LV256TC |
| 廠商： | BRILLIANCE SEMICONDUCTOR, INC. |
| 英文描述： | Very Low Power/Voltage CMOS SRAM 32K X 8 bit |
| 中文描述： | 非常低功率/電壓CMOS SRAM的32K的× 8位 |
| 文件頁(yè)數(shù)： | 2/11頁(yè) |
| 文件大?。?/td> | 331K |
| 代理商： | BS62LV256TC |
Revision 2.2
April 2001
2
BSI
C
IN
Input
Capacitance
Input/Output
Capacitance
V
IN
=0V
6
pF
C
DQ
V
I/O
=0V
8
pF
ABSOLUTE MAXIMUM RATINGS
(1)
OPERATING RANGE
CAPACITANCE
(1)
(TA = 25
o
C, f = 1.0 MHz)
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
1. This parameter is guaranteed and not tested.
SYMBOL
PARAMETER
Terminal
Respect to GND
RATING
-0.5 to
Vcc+0.5
UNITS
V
TERM
Voltage
with
V
T
BIAS
Temperature Under Bias
-40 to +125
O
C
T
STG
Storage Temperature
-60 to +150
O
C
P
T
Power Dissipation
1.0
W
I
OUT
DC Output Current
20
mA
BS62LV256
RANGE
AMBIENT
TEMPERATURE
0
O
C to +70
O
C
Vcc
Commercial
2.4V ~ 5.5V
Industrial
-40
O
C to +85
O
C
2.4V ~ 5.5V
R0201-BS62LV256
Name
Function
A0-A14 Address Input
These 15 address inputs select one of the 32768 x 8-bit words in the RAM
CE Chip Enable Input
CE is active LOW. Chip enables must be active when data read from or write to the
device. If chip enable is not active, the device is deselected and is in a standby power
mode. The DQ pins will be in the high impedance state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.
These 8 bi-directional ports are used to read data from or write data into the RAM.
WE Write Enable Input
OE Output Enable Input
DQ0 – DQ7 Data Input/Output
Ports
Vcc
Power Supply
Gnd
Ground
TRUTH TABLE
PIN DESCRIPTIONS
MODE
WE
CE
OE
I/O OPERATION
Vcc CURRENT
Not selected
Output Disabled
Read
Write
X
H
H
L
H
L
L
L
X
H
L
X
High Z
High Z
D
OUT
D
IN
I
CCSB
, I
CCSB1
I
CC
I
CC
I
CC
SYMBOL
PARAMETER
CONDITIONS
MAX.
UNIT
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| BS62LV256TC55 | 制造商:BSI 制造商全稱:Brilliance Semiconductor 功能描述:Very Low Power CMOS SRAM 32K X 8 bit |
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| BS62LV256TCP55 | 制造商:BSI 制造商全稱:Brilliance Semiconductor 功能描述:Very Low Power CMOS SRAM 32K X 8 bit |
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