參數(shù)資料
型號： AT83C51RB2XXX-SLSIL
廠商： ATMEL CORP
元件分類： 微控制器/微處理器
英文描述： Microcontroller
中文描述： 8-BIT, MROM, 40 MHz, MICROCONTROLLER, PQCC44
封裝： PLASTIC, LCC-44
文件頁數(shù)： 22/81頁
文件大小： 1082K
代理商： AT83C51RB2XXX-SLSIL
23
AT80C51RD2/AT83C51Rx2
4113A–8051–09/02
Programmable
Counter Array (PCA)
The PCA provides more timing capabilities with less CPU intervention than the standard
timer/counters. Its advantages include reduced software overhead and improved accu-
racy. The PCA consists of a dedicated timer/counter which serves as the time base for
an array of five compare/capture modules. Its clock input can be programmed to count
any one of the following signals:
Timer 0 overflow
External input on ECI (P1.2)
Peripheral clock frequency (F
CLK PERIPH
)
÷
6
Peripheral clock frequency (F
CLK PERIPH
)
÷
2
Each compare/capture modules can be programmed in any one of the following modes:
Rising and/or falling edge capture
Software timer
High-speed output
Pulse width modulator
Module 4 can also be programmed as a Watchdog Timer (see Section "PCA Watchdog
Timer", page 34).
When the compare/capture modules are programmed in the capture mode, software
timer, or high-speed output mode, an interrupt can be generated when the module exe-
cutes its function. All five modules plus the PCA timer overflow share one interrupt
vector.
The PCA timer/counter and compare/capture modules share Port 1 for external I/O.
These pins are listed below. If the port is not used for the PCA, it can still be used for
standard I/O.
The PCA timer is a common time base for all five modules (see Figure 8). The timer
count source is determined from the CPS1 and CPS0 bits in the CMOD register
(Table 11) and can be programmed to run at:
1/6 the
peripheral clock frequency (F
CLK PERIPH
)
1/2 the
peripheral clock frequency (F
CLK PERIPH
)
The Timer 0 overflow
The input on the ECI pin (P1.2)
PCA Component
External I/O Pin
16-bit Counter
P1.2/ECI
16-bit Module 0
P1.3/CEX0
16-bit Module 1
P1.4/CEX1
16-bit Module 2
P1.5/CEX2
16-bit Module 3
P1.6/CEX3
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