參數(shù)資料
型號: AT80C51RD2
廠商: Atmel Corp.
英文描述: ER 6C 3#16 3#8 SKT RECP BOX
中文描述: 80C51的高性能ROM的8位微控制器
文件頁數(shù): 75/81頁
文件大?。?/td> 1082K
代理商: AT80C51RD2
76
AT80C51RD2/AT83C51Rx2
4113A–8051–09/02
Shift Register Timing Waveforms
External Clock Drive Waveforms
AC Testing Input/Output Waveforms
AC inputs during testing are driven at V
CC
- 0.5 for a logic “1” and 0.45V for a logic “0”.
Timing measurement are made at V
IH
min for a logic “1” and V
IL
max for a logic “0”.
Float Waveforms
For timing purposes as port pin is no longer floating when a 100 mV changes from load
voltage occurs and begins to float when a 100 mV change from the loaded V
OH
/V
OL
level
occurs. I
OL
/I
OH
≥ ±
20 mA.
Clock Waveforms
Valid in normal clock mode. In X2 mode XTAL2 must be changed to XTAL2/2.
INPUT DATA
VALID
VALID
VALID
VALID
0
1
2
3
4
5
6
8
7
ALE
CLOCK
OUTPUT DATA
WRITE to SBUF
CLEAR RI
T
XLXL
T
QVXH
T
XHQX
T
XHDV
T
XHDX
SET TI
SET RI
INSTRUCTION
0
1
2
3
4
5
6
7
VALID
VALID
VALID
VALID
V
CC
-0.5V
0.45V
0.7V
CC
0.2V
CC
-0.1
T
CHCL
T
CLCX
T
CLCL
T
CLCH
T
CHCX
INPUT/OUTPUT
0.2 V
CC
+ 0.9
0.2 V
CC
- 0.1
V
CC
-0.5V
0.45V
FLOAT
V
OH
- 0.1 V
V
OL
+ 0.1 V
V
LOAD
V
LOAD
+ 0.1 V
V
LOAD
- 0.1 V
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參數(shù)描述
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