參數(shù)資料
型號: AT80C51RD2
廠商: Atmel Corp.
英文描述: ER 6C 3#16 3#8 SKT RECP BOX
中文描述: 80C51的高性能ROM的8位微控制器
文件頁數(shù): 64/81頁
文件大小: 1082K
代理商: AT80C51RD2
65
AT80C51RD2/AT83C51Rx2
4113A–8051–09/02
Reduced EMI Mode
The ALE signal is used to demultiplex address and data buses on port 0 when used with
external program or data memory. Nevertheless, during internal code execution, ALE
signal is still generated. In order to reduce EMI, ALE signal can be disabled by setting
AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no
longer output but remains active during MOVX and MOVC instructions and external
fetches. During ALE disabling, ALE pin is weakly pulled high.
Table 48.
AUXR Register
AUXR - Auxiliary Register (8Eh)
7
6
5
4
3
2
1
0
-
-
M0
-
XRS1
XRS0
EXTRAM
AO
Bit
Number
Bit
Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit
5
M0
Pulse length
Cleared to stretch MOVX control: the RD and the WR pulse length is 6 clock
periods (default).
Set to stretch MOVX control: the RD and the WR pulse length is 30 clock
periods.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit
3
XRS1
XRAM Size
XRS1
0
0
1
1
XRS0
0
1
0
1
XRAM Size
256 bytes (default)
512 bytes
768 bytes
1024 bytes
2
XRS0
1
EXTRAM
EXTRAM bit
Cleared to access internal XRAM using movx @ Ri/ @ DPTR.
Set to access external memory.
Programmed by hardware after Power-up regarding Hardware Security Byte
(HSB), default setting, XRAM selected.
0
AO
ALE Output bit
Cleared, ALE is emitted at a constant rate of 1/6 the oscillator frequency (or 1/3 if
X2 mode is used) (default). Set, ALE is active only during a MOVX or MOVC
instructione is used.
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