參數(shù)資料
型號(hào): AT80C51RD2
廠商: Atmel Corp.
英文描述: ER 6C 3#16 3#8 SKT RECP BOX
中文描述: 80C51的高性能ROM的8位微控制器
文件頁(yè)數(shù): 62/81頁(yè)
文件大?。?/td> 1082K
代理商: AT80C51RD2
63
AT80C51RD2/AT83C51Rx2
4113A–8051–09/02
ROM
ROM Structure
The T89C51RB2/RC2 ROM memory is divided in two different arrays:
The code array:16/32K bytes.
The config byte: 1 byte.
Hardware Config Byte
The config byte sets the starting microcontroller options and the security levels.
The starting options are X2 mode, and XRAM.
ROM Lock System
The program Lock system, when programmed, protects the on-chip program against
software piracy.
Program ROM Lock Bits
Notes:
1. U: unprogrammed
P: programmed
2. The lock bits when programmed according to Table 46 will provide different level of
protection for the on-chip code and data.
7
6
5
4
3
2
1
0
X2
-
-
-
XRAM
-
LB1
LB0
Bit
Number
Bit
Mnemonic
Description
7
X2
X2 Mode
Cleared to force X2 mode (6 clocks per instruction)
Set to force X1 mode, Standard Mode.
6
-
Reserved
5
-
Reserved
4
-
Reserved
3
XRAM
XRAM config bit
Set this bit to enable XRAM.
Clear this bit to disable XRAM.
2
-
Reserved
1-0
LB0-1
User Program ROM Lock Bits
see Table 46.
Table 46.
Program Lock bits
Program Lock Bits
Protection Description
Security
level
LB0
LB1
1
U
U
No program lock features enabled.
2
P
U
Reserved. Do not use.
3
U
P
MOVC instruction executed from external program memory are disabled from
fetching code bytes from internal memory, EA is sampled and latched on reset.
Verify disable.
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