參數(shù)資料
型號(hào): AT80C51RD2
廠商: Atmel Corp.
英文描述: ER 6C 3#16 3#8 SKT RECP BOX
中文描述: 80C51的高性能ROM的8位微控制器
文件頁(yè)數(shù): 31/81頁(yè)
文件大?。?/td> 1082K
代理商: AT80C51RD2
32
AT80C51RD2/AT83C51Rx2
4113A–8051–09/02
Figure 11.
PCA Compare Mode and PCA Watchdog Timer
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value,
otherwise an unwanted match could happen. Writing to CCAPnH will set the ECOM bit.
Once ECOM set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t
occur while modifying the compare value. Writing to CCAPnH will set ECOM. For this
reason, user software should write CCAPnL first, and then CCAPnH. Of course, the
ECOM bit can still be controlled by accessing to CCAPMn register.
High-speed Output Mode
In this mode, the CEX output (on port 1) associated with the PCA module will toggle
each time a match occurs between the PCA counter and the module's capture registers.
To activate this mode the TOG, MAT, and ECOM bits in the module's CCAPMn SFR
must be set (see Figure 12).
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
CH
CL
CCAPnH
CCAPnL
ECOMn
CCAPMn, n = 0 to 4
0xDA to0xDE
CAPNn MATn TOGn PWMn ECCFn
CAPPn
16 bit comparator
Match
CCON
0xD8
PCA IT
Enable
PCA counter/timer
RESET *
CIDL
CPS1 CPS0
ECF
CMOD
0xD9
WDTE
Reset
Write to
CCAPnL
Writeto
CCAPnH
CF
CCF2 CCF1
CCF0
CR
CCF3
CCF4
1
0
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