參數(shù)資料
型號(hào): AT27C520-70SI
廠商: ATMEL CORP
元件分類: DRAM
英文描述: ECONOLINE: RY-S_DCP - Internal SMD Technology- 1kVDC Isolation- Short Circuit Protection: Current Limit- UL94V-0 Package Material- Regulated Output- No External Components Required- Efficiency to 63%
中文描述: 64K X 8 OTPROM, 70 ns, PDSO20
封裝: 0.300 INCH, PLASTIC, SOIC-20
文件頁(yè)數(shù): 5/10頁(yè)
文件大?。?/td> 126K
代理商: AT27C520-70SI
AT27C520
5
Output Test Load
Note:
C
L
= 100 pF including jig
capacitance.
Input Test Waveforms and Measurement Levels
For -70 and -90 devices:
t
R
, t
F
< 20 ns (10% to 90%)
AC Waveforms for Read Operation
(1)
Notes:
1.
Timing measurement reference levels for all speed grades are V
OL
= 0.8V and V
OH
= 2.0V. Input AC drive levels are V
IL
=
0.45V and V
IH
= 2.4V.
OE/V
PP
may be delayed up to t
ACC
- t
OE
after the address is valid without impact on t
ACC
.
This parameter is only sampled and is not 100% tested.
Output float is defined as the point when data is no longer driven.
2.
3.
4.
ALE
OE/V
PP
AD7 - AD0
A15 - A8
tALE
ADDRESS IN
tAS
tAH
DATA OUT
tOE
tACC
tDF
tOH
Pin Capacitance
(f = 1 MHz, T = 25
°
C)
(1)
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Typ
Max
Units
Conditions
C
IN
C
OUT
4
6
pF
V
IN
= 0V
V
OUT
= 0V
8
12
pF
相關(guān)PDF資料
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