參數(shù)資料
型號: AT27C040-15JI
廠商: ATMEL CORP
元件分類: DRAM
英文描述: Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SSOP -40 to 85
中文描述: 512K X 8 OTPROM, 150 ns, PQCC32
封裝: PLASTIC, MS-016AE, LCC-32
文件頁數(shù): 7/13頁
文件大?。?/td> 194K
代理商: AT27C040-15JI
7
AT27C040
0189F–EPROM–4/03
Notes:
1. V
CC
must be applied simultaneously or before V
PP
and removed simultaneously or after V
PP
.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
– see timing diagram.
3. Program Pulse width tolerance is 100
μ
sec
±
5%.
Atmel’s AT27C040 Integrated Product Identification Code
AC Programming Characteristics
T
A
= 25
±
5°C, V
CC
= 6.5
±
0.25V, V
PP
= 13.0
±
0.25V
Symbol
Parameter
Test Conditions
(1)
Limits
Units
Min
Max
t
AS
Address Setup Time
Input Rise and Fall Times:
(10% to 90%) 20 ns
Input Pulse Levels:
0.45V to 2.4V
Input Timing Reference Level:
0.8V to 2.0V
Output Timing Reference Level:
0.8V to 2.0V
2
μ
s
t
OES
OE Setup Time
2
μ
s
t
DS
Data Setup Time
2
μ
s
t
AH
Address Hold Time
0
μ
s
t
DH
Data Hold Time
2
μ
s
t
DFP
OE High to Output Float Delay
(2)
0
130
ns
t
VPS
V
PP
Setup Time
2
μ
s
t
VCS
V
CC
Setup Time
2
μ
s
t
PW
CE Program Pulse Width
(3)
95
105
μ
s
t
OE
Data Valid from OE
(2)
150
ns
t
PRT
V
PP
Pulse Rise Time During
Programming
50
ns
Codes
Pins
Hex Data
A0
O7
O6
O5
O4
O3
O2
O1
O0
Manufacturer
0
0
0
0
1
1
1
1
0
1E
Device Type
1
0
0
0
0
1
0
1
1
0B
相關(guān)PDF資料
PDF描述
AT27C040-15PC 4-Megabit 512K x 8 OTP EPROM
AT27C040-15PI Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-TVSOP -40 to 85
AT27C040-15RC Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-TVSOP -40 to 85
AT27C040-15RI 4-Megabit 512K x 8 OTP EPROM
AT27C040-15TC Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-SOIC -40 to 85
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