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參數(shù)資料
| 型號(hào)： | ASE-FREQ-L-C |
| 廠商： | ABRACON CORP |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 0.75 MHz - 75 MHz, CMOS OUTPUT |
| 文件頁(yè)數(shù)： | 1/1頁(yè) |
| 文件大?。?/td> | 180K |
| 代理商： | ASE-FREQ-L-C |
2.5 X 3.2 X 1.1mm
Dimensions: inch (mm)
Recommended Land Pattern
MARKING:
- XX.X RS
(
XX.X First 3 digits of frequency)
R Freq. Stability option (*)
L Temperature option (*)
- ASE ZYW
(Z: month A to L; Y: year 4 for 2004
W: Traceability code (A-Z))
PIN
FUNCTION
1
2
3
4
Vdd
Tri-state
GND/Case
Output
Freq.
(MHz)
Tr/Tf max
(nSec)
TABLE
~ 20 MHz
~ 40 MHz
~ 60 MHz
10 max.
Idd max.
(max. mA)
7
13
19
~ 75 MHz
10 max.
24
Frequency Range
Operating Temperature
Storage Temperature
Overall Frequency Stability
Supply Voltage (Vdd)
Input Current
Symmetry
Rise and Fall Time (Tr/Tf)
Output Load
Output Voltage
Tristate Function
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
ABRACON IS
ISO 9001 / QS 9000
CERTIFIED
30332 Esperanza, Rancho Santa Margarita, California 92688
tel 949-546-8000 | fax 949-546-8001 | www.abracon.com
3.3Vdc CMOS COMPATIBLE SMD
CRYSTAL CLOCK OSCILLATOR
3.3Vdc CMOS COMPATIBLE SMD
CRYSTAL CLOCK OSCILLATOR
|||||||||||||||
ASE SERIES
STANDARD SPECIFICATIONS:
OPTIONS AND PART IDENTIFICATION (Left blank if standard):
OUTLINE DRAWING:
Temperature options:
L for -40°C to +85°C
Overall Frequency stability options:
C for ± 50 ppm max.
K for ± 30 ppm max.@ -20°C to 70°C only
R for ± 25 ppm max.@ -20°C to 70°C only
ASE - Frequency - Temperature - Overall Frequency Stability - Packaging
Packaging option: T for Tape and Reel (1,000pcs/reel, Dia. 180mm)
re
v2.1-6/06
APPLICATIONS:
CCD clock for VTR camera
Equipment connected to PC or PC cards
Thin equipment
FEATURES:
Compact and low in height
Low current consumption
Tri state function
Suitable for high density SMT.,
Reflow capable
Tight stability option
PARAMETERS
0.75 ~ 75 MHz
-20°C to + 70°C (See Options)
-55°C to + 100°C
± 100 ppm max. (See Options)
3.3 Vdc ± 5%
See Table
45/55% @ 50%Vdd
See Table
15 pF (max)
VOH = 0.9* Vdd min.
VOL = 0.1* Vdd max.
"1" (VIH >= 2.2 Vdc) or open: Oscillation
"0" (VIL < 0.8 Vdc) : Hi Z
Note: Decoupling capacitor shall be connected between Vdd and GND for best performance and stability.
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