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| 型號： | AS8510-ASST-500 |
| 廠商： | ams |
| 文件頁數(shù)： | 3/47頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BATTERY MANAGEMENT 20-SSOP |
| 產(chǎn)品培訓(xùn)模塊： | AS8510 Data Acquisition IC |
| 標準包裝： | 1 |
| 類型： | 電池管理 |
| 輸入類型： | 模擬，數(shù)字 |
| 輸出類型： | 模擬，數(shù)字 |
| 接口： | SPI 串行 |
| 電流 - 電源： | 5.5mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-SSOP（0.209"，5.30mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-SSOP |
| 包裝： | 標準包裝 |
| 其它名稱： | AS8510-ASST-500DKR |
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Revision 3.5
10 - 46
AS8510
Datasheet - Electrical Character i s t ics
6.4.1 Differential Input Amplifier for Current Channel
Notes:
1. Leakage test accuracy is limited by tester resource accuracy and tester hardware.
2. For gain 100 PGA input common mode is 0V and the minimum supply is 3.15V.
3. The measurement ranges are referred only by the gain of input amplifier, while other parameters such as bandwidth etc. are pro-
grammed independently.
4. This parameter is not measured directly in production. It is measured indirectly via gain measurements of the whole path. It is guaran-
teed by design.
5. Pole frequency of input amplifier changes with GAIN. The number is valid for the gain at G1, while the bandwidth will be higher for other
ranges. This parameter is not measured in production.
6. Based on device evaluation. Not tested.
7. These offsets are cancelled if chopping enabled (default).
8. Noise density calculated by taking system bandwidth as 150Hz.
9. Refer to Measurement Ranges shown in Table 13.
10. No impact on the measurement path. If the chopping is enabled, both the offset and offset drift will be eliminated.
11. For negative input voltages up to -160mV below ground, Input leakage is typically -20nA @ 65C due to forward conductance of
protection diode.
Table 15. Differential Input Amplifier for Current Channel
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VIN_AMP
Input voltage range
RSHH and RSHL
-160
+160
mV
IIN_AMP
Input current
1, 11
RSHH and RSHL@ +160mV input
voltage at 125C with PGA
-50
2
50
nA
ICM
Absolute input voltage range
2
-160
+300
mV
G = G1
Gain1
3, 4, 9
I10
100
G = G2
Gain2
3, 4, 9
I200
40
G = G3
Gain3
3, 4, 9
I400
25
G = G4
Gain4
3, 4, 9
I1500
5
e
Gain deviation
i = 1, 2, 3, 4
0.9 * Gi
1.1 * Gi
fP_AMP
Pole frequency
4, 5
15
kHz
εT1
Gain drift with temperature
6
-20C to +65C
Gain 5, 25, referenced to room
temperature
±0.3
%
VOSDRIFT
Offset drift with temperature
7, 10
350
V
Vos
Input referred offset
7, 10
After trim,
for temperature range -20 to +65C
350
V
Vos_ch
Chopping enabled
0
LSB
VNdin
Noise density
4, 8
25
nV/
√Hz
THD
Total harmonic distortion
For 150 Hz input signal
70
dB
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