參數(shù)資料
型號(hào): AS8510-ASST-500
廠商: ams
文件頁(yè)數(shù): 27/47頁(yè)
文件大?。?/td> 0K
描述: IC BATTERY MANAGEMENT 20-SSOP
產(chǎn)品培訓(xùn)模塊: AS8510 Data Acquisition IC
標(biāo)準(zhǔn)包裝: 1
類型: 電池管理
輸入類型: 模擬,數(shù)字
輸出類型: 模擬,數(shù)字
接口: SPI 串行
電流 - 電源: 5.5mA
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 20-SSOP
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: AS8510-ASST-500DKR
Revision 3.5
32 - 46
AS8510
Datasheet - Detailed Descr i p ti on
0A
MOD_CTL_REG
(Mode Control Registers)
0000_0000
R/W
D[7:6]
These two bits select the operating mode of the Device.
Default is 00 (Normal Mode 1)
00
Normal Mode 1
01
Normal Mode 2
10
Standby Mode 1
11
Standby Mode 2
D[5:3]
These three bits select the number of cycles to be
ignored before comparison with the set threshold in
Standy Mode. Default is 000 (3 cycles of data)
000
3 cycles of data
001
4 cycles of data
010
5 cycles of data
011
6cycles of data
100
7 cycles of data
101
8 cycles of data
110
9 cycles of data
111
10 cycles of data
D[2]
This bit controls the CHOP_CLK availability on
CHOP_CLK pin.
Default is 0
0
Disabled
1
Enabled
D[1]
Enabling the MEN pin to indicate transition from
Standby to Normal Mode.
0
Disabled
1
Enabled
D[0]
This bit is used to take the device from STOP state to
any of the Modes based on D[7:6] selection of this
register.
0
Retain in STOP state
1
Enables transition to Normal or Standby
Modes.
0B
MOD_Ta_REG1
(Ta Control Register)
1000_0000
D[7]
Unit of Ta in SBM1/SBM2. Default is 1
0
Unit is in milliseconds
1
Unit is in seconds
D[6:0]
MSB value of Ta
0C
MOD_Ta_REG2
(Ta Control Register)
0000_0000
R/W
D[7:0]
Unit of Ta in SBM1/SBM2
LSB value of Ta
0D
MOD_ITH_REG1
(Current Threshold Register)
0000_0000
R/W
D[7:0]
MSB bits of 16 bits SBM2 threshold register
0E
MOD_ITH_REG2
(Current Threshold Register)
0000_0000
R/W
D[7:0]
LSB bits of 16 bits SBM2 threshold register
Table 33. Control Registers
Addr in
HEX
Register Name
POR Value
R/W
8-bit Control / Status Data
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