- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385099 > AM79Q031JC (Electronic Theatre Controls, Inc.) Quad Subscriber Line Audio-Processing Circuit (QSLAC) Devices PDF資料下載
參數(shù)資料
| 型號： | AM79Q031JC |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Quad Subscriber Line Audio-Processing Circuit (QSLAC) Devices |
| 中文描述： | 四用戶線路音頻處理電路（QSLAC）設(shè)備 |
| 文件頁數(shù)： | 43/68頁 |
| 文件大?。?/td> | 1361K |
| 代理商： | AM79Q031JC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁當(dāng)前第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
SLAC Products
43
16, 17. Read Real-Time Data Register
(4D/4Fh)
C = 0: Do not clear interrupt
MPI Command
C = 1: Clear interrupt
This register writes/reads real-time data with or without clearing the interrupt.
Real Time Data
CDA1
CDB1
CDA2
CDB2
CDA3
CDB3
CDA4
CDB4
Debounced data bit 1 on Channel 1
Data bit 2 or multiplexed data bit 1 on Channel 1
Debounced data bit 1 on Channel 2
Data bit 2 or multiplexed data bit 1 on Channel 2
Debounced data bit 1 on Channel 3
Data bit 2 or multiplexed data bit 1 on Channel 3
Debounced data bit 1 on Channel 4
Data bit 2 or multiplexed data bit 1 on Channel 4
This command does not depend on the state of the Channel Enable Register.
18, 19. Write/Read AISN and Analog Gains
(50/51h)
R/W = 0: Write
MPI Command
R/W = 1: Read
RSVD
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
Transmit Analog Gain
AX = 0*
AX = 1
0 dB gain
6.02 dB gain
Receive Analog Loss
AR = 0*
AR = 1
0 dB loss
6.02 dB loss
AISN coefficient
AISN = 0*
–
31
The Impedance Scaling Network (AISN) gain can be varied from
–
0.9375 to 0.9375
in multiples of 0.0625. The gain coefficient is decoded using the following equation:
h
AISN
0.0625
=
16
AISN4
8
AISN3
+
+
(
[
See below (Default value = 0)
where h
AISN
is the gain of the AISN. A value of AISN = 10000 turns on the Full Digital
Loopback mode and a value of AISN = 0000* indicates a gain of 0 (cutoff).
* Power Up and Hardware Reset (
RST
) Value = 00h.
D
7
0
D
6
1
D
5
0
D
4
0
D
3
1
D
2
1
D
1
C
D
0
1
Command
Output Data
CDB4
CDA4
CDB3
CDA3
CDB2
CDA2
CDB1
CDA1
D
7
0
D
6
1
AX
D
5
0
AR
D
4
1
D
3
0
D
2
0
D
1
0
D
0
R/W
AISN0
Command
I/O Data
RSVD
AISN4
AISN3
AISN2
AISN1
4
AISN2
2
AISN1
AISN0
+
+
)
16
–
]
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AMC1601B | CONTOUR DRAWING & BLOCK DIAGRAM |
| AMC2596 | 150 KHz, 3A STEP DOWN VOLTAGE REGULATOR |
| AMC2596-3.3 | 150 KHz, 3A STEP DOWN VOLTAGE REGULATOR |
| AMC2596-5.0 | 150 KHz, 3A STEP DOWN VOLTAGE REGULATOR |
| AMC2596-ADJ | 150 KHz, 3A STEP DOWN VOLTAGE REGULATOR |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM79Q061JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| AM79Q061VC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| AM79Q063VC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| AM79Q2241VC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| AM79Q2242JC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。