參數(shù)資料
型號(hào): AM79Q02
廠商: Electronic Theatre Controls, Inc.
英文描述: Quad Subscriber Line Audio-Processing Circuit (QSLAC) Devices
中文描述: 四用戶線路音頻處理電路(QSLAC)設(shè)備
文件頁(yè)數(shù): 52/68頁(yè)
文件大小: 1361K
代理商: AM79Q02
52
Am79Q02/021/031 Data Sheet
43, 44. Write/Read B2 Filter Coefficients (IIR)
(96/97h)
R/W = 0: Write
MPI Command
R/W = 1: Read
This function is described in
Write/Read B1 Filter Coefficients (FIR)
on page 49.
Power Up and Hardware Reset (
RST
) Values = AC01 (Hex) (B
11
= 0.97656)
See note under Commands 31 and 32.
45, 46. Write/Read Debounce Time Register**
(C8/C9h)
R/W = 0: Write
MPI Command
R/W = 1: Read
Enable E1
EE1 = 0*
EE1 = 1
E1 multiplexing turned off
E1 multiplexing turned on
E1 Polarity
E1P = 0*
E1P = 1
There is no E1 output unless CMODE = 1.
Debounce for Switchhook
E1 is a high-going pulse
E1 is a low-going pulse
DSH = 0
15
DSH contains the debouncing time (in ms) of the CD1 data (usually switchhook)
entering the Real Time Data register described earlier. The input data must remain
stable for the debouncing time in order to change the appropriate real time bit.
Reserved for future use. Always write as 0, but 0 is not guaranteed when read.
Debounce period in ms
RSVD
Enable Chopper
ECH = 0*
ECH = 1
Chopper output (CHCLK) turned off
Chopper output (CHCLK) turned on
* Power Up and Hardware Reset (
RST
) Value = 20h.
** This command applies to all channels and does not depend on the state of the Channel
Enable Register.
D
7
1
D
6
0
D
5
0
D
4
1
D
3
0
D
2
1
D
1
1
D
0
R/W
Command
I/O Data Byte 1
I/O Data Byte 2
C411
C211
m411
m211
C311
C111
m311
m111
D
7
1
EE1
D
6
1
E1P
D
5
0
D
4
0
D
3
1
D
2
0
D
1
0
D
0
R/W
ECH
Command
I/O Data
DSH3
DSH2
DSH1
DSH0
RSVD
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