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參數(shù)資料
| 型號： | AM29BDS640GTD4WSI |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 14 ns, PBGA80 |
| 封裝： | 11 X 12 MM, 0.80 MM PITCH, FBGA-80 |
| 文件頁數(shù)： | 41/65頁 |
| 文件大?。?/td> | 899K |
| 代理商： | AM29BDS640GTD4WSI |
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October 31, 2002
Am29BDS640G
45
AD V A NCE
INF O R M A T IO N
AC CHARACTERISTICS
Asynchronous Read
Notes:
1. Asynchronous Access Time is from the last of either stable addresses or the falling edge of AVD#.
2. Not 100% tested.
Note: RA = Read Address, RD = Read Data.
Figure 18.
Asynchronous Mode Read with Latched Addresses
Parameter
Description
D3, D4
D8, D9
C3, C4
C8, C9
Unit
JEDEC
Standard
tCE
Access Time from CE# Low
Max
70
90
ns
tACC
Asynchronous Access Time (Note 1)
Max
70
90
ns
tAVDP
AVD# Low Time
Min
12
ns
tAAVDS
Address Setup Time to Rising Edge of AVD
Min
5
ns
tAAVDH
Address Hold Time from Rising Edge of AVD
Min
7
ns
tOE
Output Enable to Output Valid
Max
13.5
20
ns
tOEH
Output Enable Hold
Time
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
tOEZ
Output Enable to High Z (Note 2)
Max
10
10.5
ns
tCAS
CE# Setup Time to AVD#
Min
0
ns
tCE
WE#
A21-A0
CE#
OE#
Valid RD
tACC
tOEH
tOE
DQ15-DQ0
tOEZ
tAAVDH
tAVDP
tAAVDS
AVD#
RA
tCAS
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