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參數(shù)資料
| 型號： | AK5354 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | Lowe Power 20Bit ΔΣ ADC with PGA(帶可編程增益放大器的低電壓20位ΔΣA/D轉換器) |
| 中文描述： | 洛功率20位ΔΣADC的（帶可編程增益放大器的低電壓20位ΔΣA/數(shù)轉換器與美國PGA） |
| 文件頁數(shù)： | 14/19頁 |
| 文件大?。?/td> | 109K |
| 代理商： | AK5354 |
ASAHI KASEI
[AK5354]
MS0054-E-01
2001/01
- 14 -
Input Analog PGA Control
Addr
03H
Register Name
Input Analog PGA Control
RESET
D7
ZEIP
0
D6
D5
D4
D3
D2
D1
D0
IPGA6
IPGA5
IPGA4
IPGA3
00H (MUTE)
IPGA2
IPGA1
IPGA0
ZEIP:
Select IPGA zero crossing operation (0: Disable, 1: Enable)
Writing to IPGA value at ZEIP = “1”, IPGA value of L/R channels changes by zero crossing
detection or timeout independently.
In the timeout cycle, it is possible to set in ZTM1-0 bit.
When ZTM1-0 is “11”, timeout cycle is 2048/fs = 46.4ms (@fs=44.kHz).
When ZEIP is “0”, IPGA changes immediately. When PM1 is “0”, ZEIP is ignored and IPGA does
the operation which is the same as the case of ZEIP = “0”.
IPGA6-0: Input Analog PGA. 97 levels. 00H=MUTE.
ON/OFF of zero crossing detection can be controlled by ZEIP bit.
Inhibits writing at PM0 = “0”.
DATA
60H
5FH
5EH
28H
27H
19H
18H
17H
16H
11H
10H
0FH
0EH
05H
04H
03H
02H
01H
00H
GAIN(dB)
+28.0
+27.5
+27.0
+0.0
-0.5
-7.5
-8.0
-9.0
-10.0
-15.0
-16.0
-18.0
-20.0
-38.0
-40.0
-44.0
-48.0
-52.0
MUTE
Table 4. Input Gain Setting
Step
Level
0.5dB
73
1dB
8
2dB
12
4dB
3
1
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PDF描述 |
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| AK5354VT | Circular Connector; No. of Contacts:55; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:16-35 RoHS Compliant: No |
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相關代理商/技術參數(shù) |
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| AK5354_04 | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 20bit ツヒ ADC with PGA |
| AK5354VT | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 20bit ツヒ ADC with PGA |
| AK5355 | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER 16BIT ADC |
| AK5355_05 | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 16bit ツヒ ADC |
| AK5355VN | 制造商:AKM 制造商全稱:AKM 功能描述:PLL & MIC-AMP 16-Bit Stereo ADC |
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