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參數(shù)資料
| 型號(hào)： | AK5353 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 英文描述： | 96kHz ΔΣ 24bit ADC with Single-ended Input(帶寬采樣率4KHz到96KHz和單端輸入的24位立體聲ΔΣA/D轉(zhuǎn)換器) |
| 中文描述： | 96kHz的ΔΣADC的24位單端輸入（帶寬采樣率為4kHz到96kHz的和單端輸入的24位立體聲ΔΣA/數(shù)轉(zhuǎn)換器） |
| 文件頁(yè)數(shù)： | 11/17頁(yè) |
| 文件大?。?/td> | 114K |
| 代理商： | AK5353 |
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ASAHI KASEI
[AK5353]
M0067-E-00
1999/06
- 11 -
OPERATION OVERVIEW
n
System Clock Input
The external clocks which are required to operate the AK5353 are MCLK(256fs/384fs/512fs), LRCK(1fs), SCLK.
MCLK should be synchronized with LRCK but the phase is not critical. When 384fs or 512fs clock is input to MCLK pin,
the internal master clock becomes 256fs(=384fs*2/3=512fs*1/2). Table 1 illustrates standard audio word rates and
corresponding frequencies used in the AK5353.
All external clocks (MCLK,BICK,LRCK) should always be present whenever the AK5353 is in normal operation mode
(PDN= H ). If these clocks are not provided, the AK5353 may draw excess current and may not possibly operate properly
because the device utilizes dynamic refreshed logic internally. If the external clocks are not present, the AK5353 should
be in the power-down mode (PDN= L ). After exiting reset at power-up etc., the AK5353 is in the power-down mode
until MCLK and LRCK are input.
MCLK
384fs
12.2880MHz
16.9344MHz
18.4320MHz
36.8640MHz
SCLK
64fs
2.0480MHz
2.8224MHz
3.0720MHz
6.1440MHz
fs
256fs
512fs
32fs
128fs
32.0kHz
44.1kHz
48.0kHz
96.0kHz
8.1920MHz
11.2896MHz
12.2880MHz
24.5760MHz
16.3840MHz
22.5792MHz
24.5760MHz
N/A
1.0240MHz
1.4112MHz
1.5360MHz
3.0720MHz
4.0960MHz
5.6448MHz
6.1440MHz
N/A
Table 1. Example of System Clock
n
Serial Data Interface
2 kinds of data format can be selected by DIF pin. The data is clocked out via the SDTO pin by SCLK corresponding to
the setting of DIF pin. The format of output data is 2 s complement MSB first.
Mode
0
1
DIF
0
1
Format
24bit, MSB justified, L/R, SCLK
≥
48fs (16bit, MSB justified, L/R, SCLK
≥
32fs)
24bit, I2S, SCLK
≥
48fs (16bit, I2S, SCLK
≥
32fs)
Table 2. Audio Serial Interface Formats
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AK5353VT | 96kHz 24BIT ADC WITH SIGLE-ENDED INPUT |
| AK5354 | Lowe Power 20Bit ΔΣ ADC with PGA(帶可編程增益放大器的低電壓20位ΔΣA/D轉(zhuǎn)換器) |
| AK5354VT | Circular Connector; No. of Contacts:55; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:16-35 RoHS Compliant: No |
| AK5355VN | Low Power 16bit ツヒ ADC |
| AK5355 | LOW POWER 16BIT ADC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK5353VT | 制造商:AKM 制造商全稱:AKM 功能描述:96kHz 24BIT ADC WITH SIGLE-ENDED INPUT |
| AK5353VTP-E2 | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:24BIT 96K 96DB |
| AK5354 | 制造商:AKM 制造商全稱:AKM 功能描述:EVALUATION BOARD REV.A FOR AK5354 |
| AK5354_04 | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 20bit ツヒ ADC with PGA |
| AK5354VT | 制造商:AKM 制造商全稱:AKM 功能描述:Low Power 20bit ツヒ ADC with PGA |
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