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參數(shù)資料
| 型號： | AK5351-VF |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | 圓形連接器 |
| 英文描述： | Circular Connector; No. of Contacts:26; Series:MS27484; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:16; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:16-26 RoHS Compliant: No |
| 中文描述： | 增強(qiáng)雙位20位模數(shù)轉(zhuǎn)換器 |
| 文件頁數(shù)： | 10/19頁 |
| 文件大?。?/td> | 174K |
| 代理商： | AK5351-VF |
ASAHI KASEI
[AK5351]
0166-E-00
1997/4
- 10 -
OPERATION OVERVIEW
System clock
In slave mode, MCLK(256fs/384fs), LRCK(fs) and SCLK(64fs) are required for AK5351. Use a signal divided
from the MCLK for LRCK. In master mode, only MCLK is needed. A LRCK clock rate meets standard audio
rates (32kHz, 44.1kHz, 48kHz). In slave mode, the MCLK should be synchronized with LRCK but the phase is
free of care.
The AK5351 includes the phase detect circuit for LRCK clock, the AK5351 is reset automatically when the
synchronization is out of phase by changing the clock frequencies. (Please refer to the "Asynchronization -
reset."). When changing sampling frequency(fs) after power-up, AK5351 should be reset.
During the operation (PD="H") following external clocks should never be stopped : CLK in master mode and
MCLK, SCLK and LRCK in slave mode. When the clocks stop there is a possibility that the device comes into
a malfunction because of over currents in the dynamic logic. If the external clocks are not present, the AK5351
should be in the power-down mode. (PD="L")
Master Clock (MCLK)
256fs
8.1920MHz
11.2896MHz
12.2880MHz
Table 1 . System Clock
fs
384fs
SCLK(64fs)
32.0kHz
44.1kHz
48.0kHz
12.2880MHz
16.9344MHz
18.4320MHz
2.0480MHz
2.8224MHz
3.0720MHz
Clock Circuit
CMODE
MCLK
L
256fs
H
384fs
AK5351 has an internal divider as shown in the above figure. The device can interface either or an external
MCLK(256fs or 384fs) by controlling CMODE pin.
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PDF描述 |
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| AK5352 | 96kHz Sampling ΔΣ 20bit ADC(用于DAT和DVD的20位2通道A/D轉(zhuǎn)換器（采用加強(qiáng)型雙位結(jié)構(gòu)）) |
| AK5352-VF | 96kHz Sampling 20bit ADC |
| AK5353 | 96kHz ΔΣ 24bit ADC with Single-ended Input(帶寬采樣率4KHz到96KHz和單端輸入的24位立體聲ΔΣA/D轉(zhuǎn)換器) |
| AK5353VT | 96kHz 24BIT ADC WITH SIGLE-ENDED INPUT |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK5352 | 制造商:AKM 制造商全稱:AKM 功能描述:EVALUATION BOARD REV.B FOR AK5352 |
| AK5352VF | 功能描述:IC ADC 20BIT SAMPLING 24VSOP 制造商:akm semiconductor inc. 系列:* 零件狀態(tài):上次購買時(shí)間 標(biāo)準(zhǔn)包裝:1,000 |
| AK5352-VF | 制造商:AKM 制造商全稱:AKM 功能描述:96kHz Sampling 20bit ADC |
| AK5353 | 制造商:AKM 制造商全稱:AKM 功能描述:EVALUATION BOARD REV.B FOR AK5353 |
| AK5353VT | 制造商:AKM 制造商全稱:AKM 功能描述:96kHz 24BIT ADC WITH SIGLE-ENDED INPUT |
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