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參數(shù)資料
| 型號： | AK4550 |
| 廠商： | Asahi Kasei Microsystems Co.,Ltd |
| 元件分類： | Codec |
| 英文描述： | LOW POWER & SMALL PACKAGE 16BIT CODEC |
| 中文描述： | 低功耗 |
| 文件頁數(shù)： | 10/15頁 |
| 文件大?。?/td> | 102K |
| 代理商： | AK4550 |
ASAHI KASEI
[AK4550]
M0068-E-01
2000/4
- 10 -
n
Power-down & Reset
The ADC and DAC of AK4550 are placed in the power-down mode by bringing each power down pin, PWAD , PWDA
= “L” independently and each digital filter is also reset at the same time. These resets should always be done after
power-up. In case of the ADC, an anlog initialization cycle starts after exiting the power-down mode. Therefore, the
output data, SDTO becomes available after 2081 cycles of LRCK clock. This initialization cycle does not affect the DAC
operation. Figure 2 shows the power-up sequence when the ADC is powered up before the DAC power-up.
Idle Noise
The clocks may be stopped.
ADC Internal
State
PWAD
2081/fs
Normal Operation
Power-down
Init Cycle
Normal Operation
GD
GD
Clock In
MCLK,LRCK,SCLK
ADC In
(Analog)
Idle Noise
“0”data
ADC Out
(Digital)
PWDA
Normal Operation
Power-down
Normal Operation
DAC Internal
State
“0”data
DAC In
(Digital)
DAC Out
(Analog)
GD
External
Mute
Mute ON
GD
Figure 2. Power-up Sequence
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| AK4550VT | LOW POWER & SMALL PACKAGE 16BIT CODEC |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AK4550VT | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER & SMALL PACKAGE 16BIT CODEC |
| AK4550VT-E2 | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述: |
| AK4550VTP-E2 | 制造商:Asahi Kasei Microsystems Co Ltd 功能描述:16BIT 3V |
| AK4551 | 制造商:AKM 制造商全稱:AKM 功能描述:EVALUATION BOARD REV.C FOR AK4551 |
| AK4551VT | 制造商:AKM 制造商全稱:AKM 功能描述:LOW POWER & SMALL PACKAGE 20BIT CODEC |
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