1, 2, 3 (AVDD = 2.7 V t" />
參數(shù)資料
型號: ADUC824BCPZ
廠商: Analog Devices Inc
文件頁數(shù): 67/68頁
文件大?。?/td> 0K
描述: IC MCU 8K FLASH ADC/DAC 56LFCSP
標準包裝: 1
系列: MicroConverter® ADuC8xx
核心處理器: 8052
芯體尺寸: 8-位
速度: 12.58MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設備: POR,PSM,溫度傳感器,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 640 x 8
RAM 容量: 256 x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.25 V
數(shù)據(jù)轉換器: A/D 3x16b,4x24b; D/A 1x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-VFQFN 裸露焊盤,CSP
包裝: 托盤
REV. B
ADuC824
–8–
TIMING SPECIFICATIONS
1, 2, 3 (AVDD = 2.7 V to 3.6 V or 4.75 V to 5.25 V, DVDD = 2.7 V to 3.6 V or 4.75 V to 5.25 V;
all specifications TMIN to TMAX unless otherwise noted.)
32.768 kHz External Crystal
Parameter
Min
Typ
Max
Unit
Figure
CLOCK INPUT (External Clock Driven XTAL1)
tCK
XTAL1 Period
30.52
s1
tCKL
XTAL1 Width Low
15.24
s1
tCKH
XTAL1 Width High
15.24
s1
tCKR
XTAL1 Rise Time
20
ns
1
tCKF
XTAL1 Fall Time
20
ns
1
1/tCORE
ADuC824 Core Clock Frequency
4
0.098
12.58
MHz
tCORE
ADuC824 Core Clock Period
5
0.636
s
tCYC
ADuC824 Machine Cycle Time
6
0.95
7.6
122.45
s
NOTES
1AC inputs during testing are driven at DV
DD – 0.5 V for a Logic 1 and 0.45 V for a Logic 0. Timing measurements are made at V IH min for a Logic 1 and VIL max for
a Logic 0 as shown in Figure 2.
2For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when a 100 mV change from the
loaded VOH/VOL level occurs as shown in Figure 2.
3C
LOAD for Port0, ALE, PSEN outputs = 100 pF; CLOAD for all other outputs = 80 pF unless otherwise noted.
4ADuC824 internal PLL locks onto a multiple (384 times) the external crystal frequency of 32.768 kHz to provide a Stable 12.583 MHz internal clock for the system.
The core can operate at this frequency or at a binary submultiple called Core_Clk, selected via the PLLCON SFR.
5This number is measured at the default Core_Clk operating frequency of 1.57 MHz.
6ADuC824 Machine Cycle Time is nominally defined as 12/Core_CLK.
t
CHK
t
CKL
t
CK
t
CKF
t
CKR
Figure 1. XTAL1 Input
DVDD – 0.5V
0.45V
0.2DVDD + 0.9V
TEST POINTS
0.2DVDD – 0.1V
VLOAD – 0.1V
VLOAD
VLOAD + 0.1V
TIMING
REFERENCE
POINTS
VLOAD – 0.1V
VLOAD
VLOAD + 0.1V
Figure 2. Timing Waveform Characteristics
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