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參數(shù)資料
| 型號： | ADSP-2181KSZ-160 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 4/32頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 128-PQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點(diǎn) |
| 接口： | 同步串行端口（SSP） |
| 時鐘速率： | 40MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 80kB |
| 電壓 - 輸入/輸出： | 5.00V |
| 電壓 - 核心： | 5.00V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-MQFP（14x20） |
| 包裝： | 托盤 |
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ADSP-2181–SPECIFICATIONS
RECOMMENDED OPERATING CONDITIONS
K Grade
B Grade
Parameter
Min
Max
Min
Max
Unit
VDD
Supply Voltage
4.5
5.5
4.5
5.5
V
TAMB
Ambient Operating Temperature
0
+70
–40
+85
°C
ELECTRICAL CHARACTERISTICS
K/B Grades
Parameter
Test Conditions
Min
Typ
Max
Unit
VIH
Hi-Level Input Voltage
1, 2
@ VDD = max
2.0
V
VIH
Hi-Level CLKIN Voltage
@ VDD = max
2.2
V
VIL
Lo-Level Input Voltage
1, 3
@ VDD = min
0.8
V
VOH
Hi-Level Output Voltage
1, 4, 5
@ VDD = min
IOH = –0.5 mA
2.4
V
@ VDD = min
IOH = –100
A6
VDD – 0.3
V
VOL
Lo-Level Output Voltage
1, 4, 5
@ VDD = min
IOL = 2 mA
0.4
V
IIH
Hi-Level Input Current
3
@ VDD = max
VIN = VDDmax
10
A
IIL
Lo-Level Input Current
3
@ VDD = max
VIN = 0 V
10
A
IOZH
Three-State Leakage Current
7
@ VDD = max
VIN = VDDmax
8
10
A
IOZL
Three-State Leakage Current
7
@ VDD = max
VIN = 0 V
8
10
A
IDD
Supply Current (Idle)
9
@ VDD = 5.0
TAMB = +25
°C
tCK = 34.7 ns
12
mA
tCK = 30 ns
13
mA
tCK = 25 ns
15
mA
IDD
Supply Current (Dynamic)
10
@ VDD = 5.0
TAMB = +25
°C
tCK = 34.7 ns
11
65
mA
tCK = 30 ns
11
73
mA
tCK = 25 ns
11
85
mA
CI
Input Pin Capacitance
3, 6, 12
@ VIN = 2.5 V,
fIN = 1.0 MHz,
TAMB = +25
°C8
pF
CO
Output Pin Capacitance
6, 7, 12, 13
@ VIN = 2.5 V,
fIN = 1.0 MHz,
TAMB = +25
°C8
pF
NOTES
1Bidirectional pins: D0–D23, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, A1–A13, PF0–PF7.
2Input only pins:
RESET, BR, DR0, DR1, PWD.
3Input only pins: CLKIN,
RESET, BR, DR0, DR1, PWD.
4Output pins:
BG, PMS, DMS, BMS, IOMS, CMS, RD, WR, PWDACK, A0, DT0, DT1, CLKOUT, FL2-0, BGH.
5Although specified for TTL outputs, all ADSP-2186 outputs are CMOS-compatible and will drive to V DD and GND, assuming no dc loads.
6Guaranteed but not tested.
7Three-statable pins: A0–A13, D0–D23,
PMS, DMS, BMS, IOMS, CMS, RD, WR, DT0, DT1, SCLK0, SCLK1, TFS0, TFS1, RFS0, RSF1, PF0–PF7.
80 V on
BR, CLKIN Inactive.
9Idle refers to ADSP-2181 state of operation during execution of IDLE instruction. Deasserted pins are driven to either V DD or GND.
10I
DD measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (types 1, 4, 5, 12, 13, 14), 30% are type 2
and type 6, and 20% are idle instructions.
11V
IN = 0 V and 3 V. For typical figures for supply currents, refer to Power Dissipation section.
12Applies to TQFP and PQFP package types.
13Output pin capacitance is the capacitive load for any three-stated output pin.
Specifications subject to change without notice.
–12–
REV. D
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