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參數(shù)資料
| 型號(hào)： | ADL5571 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 放大器 |
| 英文描述： | 2500 MHz - 2700 MHz RF/MICROWAVE NARROW BAND MEDIUM POWER AMPLIFIER |
| 封裝： | 4 X 4 MM, ROHS COMPLIANT, LFCSP-16 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 787K |
| 代理商： | ADL5571 |
2.5 GHz to 2.7 GHz
WiMAX Power Amplifier
Preliminary Technical Data
ADL5571
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2007 Analog Devices, Inc. All rights reserved.
FEATURES
Fixed gain of 29 dB
Operation from 2.5 GHz to 2.7 GHz
EVM
≤3% with 16 QAM OFDMA
@ POUT = 25 dBm [3.5V] and
@ POUT = 27.5 dBm [5V]
Input internally matched to 50 Ω
Power supply: 3.2 V to 5 V
Quiescent current
130 mA in normal power mode
PAE: >20%
Multiple operating modes to reduce battery drain
Standby mode: 10 mA
Sleep mode: < 1 μA
APPLICATIONS
WiMAX/WiBro Mobile Terminals and CPEs
FUNCTIONAL BLOCK DIAGRAM
IM1
IM2
IM3
RFIN
VCC
VREG
MODE
Bias_1
Bias_2
Bias_3
2nd stage
1st
3
e
g
a
t
s
rd
stage
OM
RFOUT
RFIN
VCC1
VCC2
Bias_1
Bias_2
Bias_3
2nd stage
1st
3
e
g
a
t
s
rd
stage
STBY
CFLT
Figure 1.AD5571 Block Diagram
GENERAL DESCRIPTION
The ADL5571 is a high linearity 2.5 GHz to 2.7 GHz power
amplifier designed for WiMAX terminals and CPEs using TDD
operation at a duty cycle of 50% or lower. With a gain of 29 dB
and an output compression point of 31 dBm , it can operate at
an output power level up to 26 dBm while maintaining an EVM
of ≤3% with a supply voltage of 5V. PAE is greater than 20% at
POUT = 25 dBm with a 3.5V supply voltage.
The ADL5571 RF input is matched on chip and provides an
input return loss of less than 10 dB. The open-collector output
is externally matched with strip-line and external shunt
capacitance.
The ADL5571 operates over a supply voltage range from 3.2 V
to 5 V with a current of 440mA Burst RMS when delivering 25
dBm (3.5 V supply). A Standby mode is available which
reduces the quiescent current to 10 mA: useful when a TDD
terminal is receiving data.
The ADL5571 is fabricated in a GaAs HBT process and is
packaged in a 4mm x 4mm 16-Lead Pb-free RoHS compliant
LFCSP that uses an exposed paddle for excellent thermal
impedance. It operates from 40°C to +85°C.
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