參數(shù)資料
型號: ADL5519ACPZ-R2
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: 1 MHz to 10 GHz, 50 dB Dual Log Detector/Controller
中文描述: DUAL LOG OR ANTILOG AMPLIFIER, 10000 MHz BAND WIDTH, QCC32
封裝: 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD-2, LFCSP-32
文件頁數(shù): 23/27頁
文件大小: 479K
代理商: ADL5519ACPZ-R2
Preliminary Technical Data
ADL5519
EVALUATION BOARD
Table 5. Evaluation Board (Rev. A) Configuration Options
Component
Function
VPOS, GND1,
GND2, GND3
connected together.
R5, R6, C1, C2, C3,
C4
The 52.3
Ω
resistor in positions R5 and R6 combine with the ADL5519's
internal input impedance to give a broadband input impedance of about 50
Ω
. Capacitors C1, C2, C3, and C4 are dc-blocking capacitors. A reactive
impedance match can be implemented by replacing R5[R6] with an inductor
and C1[C3] and C2[C4] with appropriately valued capacitors.
Rev. PrB | Page 23 of 27
Default Conditions
Not applicable
Supply and Ground Connections. GND1, GND2, GND3 are internally
Input Interface.
R5 = 52.3
Ω
(Size 0402)
C1 = 47 nF (Size 0402)
C2 = 47 nF (Size 0402)
R6 = 52.3
Ω
(Size 0402)
C3 = 47 nF (Size 0402)
C4 = 47 nF (Size 0402)
R14 = 0
Ω
(Size 0603)
R14
Temperature Sensor Interface:
The temperature sensor output voltage is available at the test point labeled
TEMP.
Temperature Compensation Interface.
The internal temperature compensation network is optimized for input signals
up to TBD GHz when the voltage applied to the ADJ[A,B] pin is TBD V. This
circuit can be adjusted to optimize performance for other input frequencies
by changing the value of this voltage. See Table 4 for specific voltage levels.
The pads for R27/R28 or R27/R29 can be used for voltage dividers to set the
ADJ[A,B] voltages for temperature compensation at different frequencies.
The individual log channels can be disabled by installing 0Ω resistors in
positions R18 and R19
Output Interface—Measurement Mode.
In measurement mode, a portion of the output voltage is fed back to Pin
VSTA[VSTB] via R8[R12]. The magnitude of the slope of the OUTA[OUTB]
output voltage response can be increased by reducing the portion of V
OUTA
[V
OUTB
]that is fed back to VSTA[VSTB]. R20[R21} can be used as a back-
terminating resistor or as part of a single-pole, low-pass filter.
R13, R17, R18, R19,
R27, R28, R29
R13 = open (size 0603)
R17 = open (size 0603)
R18 = 0
Ω
(size 0603)
R19 = 0
Ω
(size 0603)
R27 = 0
Ω
(size 0603)
R28 = open (size 0603)
R29 = open (size 0603)
R8, R12, R15, R16,
R20, R21, R22, R23,
C13, C14
R8 = 0
Ω
(Size 0603)
R12 = 0
Ω
(Size 0603)
R15 = open (Size 0603)
R16 = open (Size 0603)
R20 = 0
Ω
(Size 0603)
R21 = 0
Ω
(Size 0603)
R22 = open (Size 0603)
R23 = open (Size 0603)
C13 = open (Size 0603)
C14 = open (Size 0603)
R8 = 0
Ω
(Size 0603)
R12 = 0
Ω
(Size 0603)
R22 = open (Size 0603)
R23 = open (Size 0603)
R8, R12, R22, R23
Output Interface—Controller Mode.
In this mode, R8[R12] must be open. In controller mode, the ADL5519 can
control the gain of an external component. A setpoint voltage is applied to Pin
VSTA[VSTB], the value of which corresponds to the desired RF input signal level
applied to the corresponding ADL5519 RF input. A sample of the RF output
signal from this variable-gain component is selected, typically via a
directional coupler, and applied to ADL5519 RF input. The voltage at Pin
OUTA[OUTB] is applied to the gain control of the variable gain element. A
control voltage is applied to Pin VSTA[VSTB]. The magnitude of the control
voltage can optionally be attenuated via the voltage divider comprising
R8[R12] and R22[R23], or a capacitor can be installed in position R22[R23] to
form a low-pass filter along with R8[R12].
Power Supply Decoupling.
The nominal supply decoupling consists of a 100 pF filter capacitor placed
physically close to the ADL5519 and a 0.1 μF capacitor placed nearer to each
power supply input pin.
R3, R4, R11, C7, C8
C11, C12, C15, C16
R3 = 0
Ω
(Size 0603)
R4 = 0
Ω
(Size 0603)
R11 = 0
Ω
(Size 0603)
C7 = 100 pF (Size 0603)
C8 = 100 pF (Size 0603)
C11 = 100 pF (Size 0603)
C12 = 0.1 μF (Size 0603)
C15 = 0.1 μF (Size 0603)
C16 = 0.1 μF (Size 0603)
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