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參數(shù)資料
| 型號： | 74LCX16244MEA |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC BUFF DVR 16BIT LOW V 48SSOP |
| 產(chǎn)品變化通告： | Die Material/Mold Compound Change 10/Sept/2008 |
| 標準包裝： | 29 |
| 系列： | 74LCX |
| 邏輯類型： | 緩沖器/線路驅(qū)動器，非反相 |
| 元件數(shù)： | 4 |
| 每個元件的位元數(shù)： | 4 |
| 輸出電流高，低： | 24mA，24mA |
| 電源電壓： | 2 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 供應商設(shè)備封裝： | 48-SSOP |
| 包裝： | 管件 |
2005 Fairchild Semiconductor Corporation
DS012000
www.fairchildsemi.com
February 1994
Revised May 2005
7
4LCX16244
Low
V
o
lt
ag
e
16-
Bit
Buf
fer
/Li
ne
Driv
er
w
ith
5V
T
o
ler
ant
Input
s
and
Output
s
74LCX16244
Low Voltage 16-Bit Buffer/Line Driver
with 5V Tolerant Inputs and Outputs
General Description
The LCX16244 contains sixteen non-inverting buffers with
3-STATE outputs designed to be employed as a memory
and address driver, clock driver, or bus oriented transmit-
ter/receiver. The device is nibble controlled. Each nibble
has separate 3-STATE control inputs which can be shorted
together for full 16-bit operation.
The LCX16244 is designed for low voltage (2.5 or 3.3V)
VCC applications with capability of interfacing to a 5V signal
environment.
The LCX16244 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V to 3.6V VCC specifications provided
s 4.5 ns tPD max, 10 PA ICCQ max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s
r24 mA output drive (VCC 3.0V)
s Uses patented noise/EMI reduction circuitry
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model
! 2000V
Machine model
! 200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
GTO
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package Number
Package Description
74LCX16244G
(Note 2)(Note 3)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LCX16244MEA
(Note 3)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LCX16244MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
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