Limit at tMIN, tMAX<" />
參數(shù)資料
型號(hào): AD7999YRJZ-1RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 2/28頁(yè)
文件大?。?/td> 0K
描述: IC ADC 8BIT 4CH I2C SOT23-8
產(chǎn)品變化通告: AD7991,5,9 Offset Error Change 17/Sept/2010
設(shè)計(jì)資源: Using AD8599 as an Ultralow Distortion Driver for the AD7999 (CN0045)
標(biāo)準(zhǔn)包裝: 10,000
位數(shù): 8
采樣率(每秒): 1M
數(shù)據(jù)接口: I²C,串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 4.68mW
電壓電源: 單電源
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: SOT-23-8
供應(yīng)商設(shè)備封裝: SOT-23-8
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 4 個(gè)單端,單極
AD7991/AD7995/AD7999
Rev. B | Page 10 of 28
Limit at tMIN, tMAX
Parameter
Conditions
Min
Typ
Max
Unit
Description
t10
Standard mode
300
ns
tFDA, fall time of the SDA signal
Fast mode
20 + 0.1 CB
300
ns
High speed mode
CB = 100 pF maximum
10
80
ns
CB = 400 pF maximum
20
160
ns
t11
Standard mode
1000
ns
tRCL, rise time of the SCL signal
Fast mode
20 + 0.1 CB
300
ns
High speed mode
CB = 100 pF maximum
10
40
ns
CB = 400 pF maximum
20
80
ns
t11A
Standard mode
1000
ns
tRCL1, rise time of the SCL signal after a repeated
start condition and after an acknowledge bit
Fast mode
20 + 0.1 CB
300
ns
High speed mode
CB = 100 pF maximum
10
80
ns
CB = 400 pF maximum
20
160
ns
t12
Standard mode
300
ns
tFCL, fall time of the SCL signal
Fast mode
20 + 0.1 CB
300
ns
High speed mode
CB = 100 pF maximum
10
40
ns
CB = 400 pF maximum
20
80
ns
Fast mode
0
50
ns
Pulse width of the suppressed spike
High speed mode
0
10
ns
tPOWER-UP
0.6
μs
Power-up and acquisition time
1 Functionality is tested during production.
2 A device must provide a data hold time for SDA in order to bridge the undefined region of the SCL falling edge.
3 For 3 V supplies, the maximum hold time with
CB = 100 pF maximum is 100 ns maximum.
t6
t7
t2
t11
t4
t1
t12
t10
t5
t9
t6
t3
t8
0
64
61
-0
02
SCL
S
SDA
S = START CONDITION
P = STOP CONDITION
P
S
Figure 2. 2-Wire Serial Interface Timing Diagram
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