參數(shù)資料
型號: AD797BN
廠商: ANALOG DEVICES INC
元件分類: 運動控制電子
英文描述: Ultralow Distortion, Ultralow Noise Op Amp
中文描述: OP-AMP, 60 uV OFFSET-MAX, 110 MHz BAND WIDTH, PDIP8
封裝: MINI, PLASTIC, DIP-8
文件頁數(shù): 10/16頁
文件大?。?/td> 406K
代理商: AD797BN
AD797
REV. C
–10–
BY PASSING CONSIDE RAT IONS
T o take full advantage of the very wide bandwidth and dynamic
range capabilities of the AD797 requires some precautions.
First, multiple bypassing is recommended in any precision
application. A 1.0
μ
F–4.7
μ
F tantalum in parallel with 0.1
μ
F
ceramic bypass capacitors are sufficient in most applications.
When driving heavy loads a larger demand is placed on the sup-
ply bypassing. In this case selective use of larger values of tanta-
lum capacitors and damping of their lead inductance with small
value (1.1
to 4.7
) carbon resistors can be an improvement.
Figure 32 summarizes bypassing recommendations. T he symbol
(**) is used throughout this data sheet to represent the parallel
combination of a 0.1
μ
F and a 4.7
μ
F capacitor.
V
S
0.1
μ
F
USE SHORT
LEAD LENGTHS
(<5mm)
KELVIN RETURN
LOAD
CURRENT
4.7 – 22.0
μ
F
USE SHORT
LEAD RETURNS
(<5mm)
OR
4.7
μ
F
V
S
1.1 – 4.7
0.1
μ
F
KELVIN RETURN
LOAD
CURRENT
Figure 32. Recommended Power Supply Bypassing
T HE NONINVE RT ING CONFIGURAT ION
Ultralow noise requires very low values of r
BB
’ (the internal
parasitic resistance) for the input transistors (
6
). T his im-
plies very little damping of input and output reactive interac-
tions. With the AD797, additional input series damping is
required for stability with direct input to output feedback. A
100
resistor in the inverting input (Figure 33) is sufficient;
the 100
balancing resistor (R2) is recommended, but is not
required for stability. T he noise penalty is minimal (e
N
total
2.1 nV/
Hz
), which is usually insignificant. Best response
flatness is obtained with the addition of a small capacitor
(C
L
< 33 pF) in parallel with the 100
resistor (Figure 34).
T he input source resistance and capacitance will also affect the
response slightly and experimentation may be necessary for best
results.
R2
100
R1
100
V
OUT
** USE POWER SUPPLY BYPASSING SHOWN IN FIGURE 32.
V
IN
R
L
600
AD797
**
2
7
3
4
6
**
–V
S
+V
S
Figure 33. Voltage Follower Connection
Low noise preamplification is usually done in the noninverting
mode (Figure 35). For lowest noise the equivalent resistance of
the feedback network should be as low as possible. T he 30 mA
minimum drive current of the AD797 makes it easier to achieve
this. T he feedback resistors can be made as low as possible with
due consideration to load drive and power consumption. T able
II gives some representative values for the AD797 as a low noise
follower. Operation on 5 volt supplies allows the use of a 100
or less feedback network (R1 + R2). Since the AD797 shows
no unusual behavior when operating near its maximum rated
current, it is suitable for driving the AD600/AD602 (Figure 47)
while preserving their low noise performance.
Optimum flatness and stability at noise gains >1 sometimes
requires a small capacitor (C
L
) connected across the feedback
resistor (R1, Figure 35). T able II includes recommended values
of C
L
for several gains. In general, when R2 is greater than
100
and C
L
is greater than 33 pF, a 100
resistor should
be placed in series with C
L
. Source resistance matching is
assumed, and the AD797 should never be operated with unbal-
anced source resistance >200 k
/G.
R
S
*
C
S
*
100
AD797
**
2
7
3
4
6
**
V
OUT
–V
S
+V
S
* SEE TEXT
** USE POWER SUPPLY BYPASSING SHOWN IN FIGURE 32.
V
IN
600
C
L
Figure 34. Alternative Voltage Follower Connection
R2
R1
R
L
AD797
**
2
7
3
4
6
**
V
OUT
–V
S
+V
S
** USE POWER SUPPLY BYPASSING SHOWN IN FIGURE 32.
V
IN
C
L
Figure 35. Low Noise Preamplifier
T able II. Values for Follower With Gain Circuit
Noise
(E xcluding r
S
)
Gain
R1
R2
C
L
2
2
10
20
>35
1 k
300
33.2
16.5
10
1 k
300
300
316
(G–1) 10
20 pF
10 pF
5 pF
3.0 nV/
Hz
1.8 nV/
Hz
1.2 nV/
Hz
1.0 nV/
Hz
0.98 nV/
Hz
T he I-to-V converter is a special case of the follower configura-
tion. When the AD797 is used in an I-to-V converter, for in-
stance as a DAC buffer, the circuit of Figure 36 should be used.
T he value of C
L
depends on the DAC and again, if C
L
is
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