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鍨嬭櫉锛� A3P030-1QNG48I
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ProASIC3 DC and Switching Characteristics
2-8
Revision 13
Table 2-11 Summary of I/O Output Buffer Power (per pin) 鈥� Default I/O Software Settings1
Applicable to Advanced I/O Banks
CLOAD (pF)
VCCI (V)
Static Power
PDC3 (mW)2
Dynamic Power
PAC10 (W/MHz)3
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS
35
3.3
鈥�
468.67
3.3 V LVCMOS Wide Range4
35
3.3
鈥�
468.67
2.5 V LVCMOS
35
2.5
鈥�
267.48
1.8 V LVCMOS
35
1.8
鈥�
149.46
1.5 V LVCMOS
(JESD8-11)
35
1.5
鈥�
103.12
3.3 V PCI
10
3.3
鈥�
201.02
3.3 V PCI-X
10
3.3
鈥�
201.02
Differential
LVDS
鈥�
2.5
7.74
88.92
LVPECL
鈥�
3.3
19.54
166.52
Notes:
1. Dynamic power consumption is given for standard load and software default drive strength and output slew.
2. PDC3 is the static power (where applicable) measured on VCCI.
3. PAC10 is the total dynamic power measured on VCC and VCCI.
4. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B specification.
Table 2-12 Summary of I/O Output Buffer Power (Per Pin) 鈥� Default I/O Software Settings1
Applicable to Standard Plus I/O Banks
CLOAD (pF)
VCCI (V)
Static Power
PDC3 (mW)2
Dynamic Power
PAC10 (W/MHz)3
Single-Ended
3.3 V LVTTL / 3.3 V LVCMOS
35
3.3
鈥�
452.67
3.3 V LVCMOS Wide Range4
35
3.3
鈥�
452.67
2.5 V LVCMOS
35
2.5
鈥�
258.32
1.8 V LVCMOS
35
1.8
鈥�
133.59
1.5 V LVCMOS (JESD8-11)
35
1.5
鈥�
92.84
3.3 V PCI
10
3.3
鈥�
184.92
3.3 V PCI-X
10
3.3
鈥�
184.92
Notes:
1. Dynamic power consumption is given for standard load and software default drive strength and output slew.
2. PDC3 is the static power (where applicable) measured on VMV.
3. PAC10 is the total dynamic power measured on VCC and VMV.
4. All LVCMOS 3.3 V software macros support LVCMOS 3.3 V wide range as specified in the JESD8-B specification.
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