參數(shù)資料
型號: MAX1422ECM
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: ADC
英文描述: 12-Bit, 20Msps, 3.3V, Low-Power ADC with Internal Reference
中文描述: 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, MS-026-BBC, TQFP-48
文件頁數(shù): 13/15頁
文件大?。?/td> 727K
代理商: MAX1422ECM
Aperture Delay
Aperture delay (t
AD
) is the time defined between the
falling edge of the sampling clock and the instant when
an actual sample is taken (Figure 10).
Signal-to-Noise Ratio (SNR)
For a waveform perfectly reconstructed from digital
samples, the theoretical maximum SNR is the ratio of
the full-scale analog input (RMS value) to the RMS
quantization error (residual error). The ideal, theoretical,
minimum analog-to-digital noise is caused by quantiza-
tion error only and results directly from the ADCs reso-
lution (N-Bits):
SNR
(MAX)
= (6.02
N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise e.g., thermal noise, reference noise, clock
jitter, etc. SNR is computed by taking the ratio of the
RMS signal to the RMS noise, which includes all spec-
tral components minus the fundamental, the first four
harmonics, and the DC offset.
Signal-to-Noise Plus Distortion (SINAD)
SINAD is computed by taking the ratio of the RMS sig-
nal to all spectral components minus the fundamental
and the DC offset.
Effective Number of Bits (ENOB)
ENOB specifies the dynamic performance of an ADC at
a specific input frequency and sampling rate. An ideal
ADCs error consists of quantization noise only. ENOB is
computed from:
ENOB
SINAD
=
-
1 76
.
6 02
.
M
12-Bit, 20Msps, 3.3V, Low-Power ADC with
Internal Reference
______________________________________________________________________________________
13
INPUT
300
-5V
5V
0.1
μ
F
0.1
μ
F
0.1
μ
F
C
IN
*
22pF
C
IN
*
22pF
1nF
0.22
μ
F
44pF*
R
ISO
50
R
ISO
50
-5V
600
300
300
INP
INN
LOWPASS FILTER
CML
600
5V
-5V
0.1
μ
F
300
300
600
300
0.1
μ
F
0.1
μ
F
0.1
μ
F
5V
0.1
μ
F
300
MAX4108
MAX1422
MAX4108
MAX4108
LOWPASS FILTER
*TWO C
IN
(22pF) CAPS MAY BE REPLACED BY
ONE 44pF CAP, TO IMPROVE PERFORMANCE.
Figure 7. Typical Application Circuit for Single-Ended to Differential Conversion
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