
Philips Semiconductors
Product data
CBT3126
Quadruple FET bus switch
2001 Dec 12
4
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.1
MAX.
UNIT
VIK
Input clamp voltage
VCC = 4.5 V;
II = –18 mA
—
–1.2
V
II
Input leakage current
VCC = 5.5 V;
VI = 5.5 V or GND
—
±1
A
ICC
Quiescent supply current
VCC = 5.5 V; IO = 0;
VI = VCC or GND
—
3
A
ICC
Additional supply current per
input pin (Note 2)
control inputs
VCC = 5.5 V;
one input at 3.4 V,
other inputs at VCC or GND
—
2.5
mA
CI
Input capacitance
control inputs
VI = 3 V or 0
—
1.7
—
pF
CIO(OFF)
Power-off leakage current
VO = 3 V or 0; OE = GND
—
3.4
—
pF
VP
Pass gate voltage
VCC = 5.0 V;
VI = 5.0 V
—
3.8
—
V
VCC = 4 V;
TYP at VCC = 4 V;
VI = 2.4 V; II = 15 mA
—
16
22
ron
On-resistance (Note 3)
VCC = 4.5 V; VI = 0 V;
II = 64 mA
—
5
7
on
()
VCC = 4.5 V; VI = 0 V;
II = 30 mA
—
5
7
VCC = 4.5 V; VI = 2.4 V;
II = 15 mA
—
10
15
NOTES:
1. All typical values are at VCC = 5 V, unless otherwise noted. Tamb = 25 °C.
2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is
determined by the lower of the voltages of the two (A or B) terminals.
AC CHARACTERISTICS
Tamb = –40 to +85 °C; CL = 50 pF, unless otherwise noted.
SYMBOL
PARAMETER
FROM (INPUT)
TO
VCC = 5 V ± 0.5 V
UNIT
SYMBOL
PARAMETER
FROM (INPUT)
(OUTPUT)
Min
Max
UNIT
tpd
Propagation delay1
A or B
B or A
0.25
ns
ten
Output enable time
to High and Low level
OE
A or B
1.6
4.5
ns
tdis
Output disable time
from High and Low level
OE
A or B
1
4.0
ns
NOTE:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant of the typical on-state
resistance of the switch and a load capacitance of 50 pF, when driven by an ideal voltage source (zero output impedance).