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參數(shù)資料
| 型號(hào)： | 73S8023C-IM/F |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 4/27頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SMART CARD INTERFACE 32-QFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 控制器類型： | 智能卡接口 |
| 電源電壓： | 2.7 V ~ 3.6 V |
| 電流 - 電源： | 4.9mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-QFN（5x5） |
| 包裝： | 管件 |
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73S8023C Data Sheet
DS_8023C_019
12
Rev. 1.5
CMDVCC
VCC
IO
OFF
RSTIN
RST
STROBE
CLK
t0 - Deactivation starts after
CMDVCC is set high or OFF falls due to card removal or fault
t4 - VCC is shut down
(Note: Host should set STROBE low when
CMDVCC is set high, otherwise CLK may be truncated.
CLK truncation may occur if
an OFF event is triggered)
t3 - IO falls approx 2us after CLK falls
t1 - RST falls approx. 0.5us after deactivation begins
t2 - CLK falls approx. 7.5us after RST falls
-- OR --
t0 t1 t2 t3
t5
t4
t5 - VCC goes to 0 after discharge of VCC capacitor, approx 100us after deactivation begins
Figure 4: Synchronous Deactivation Operation – CKSEL = High
8.3
Activation Sequence (Asynchronous Mode)
The 73S8023C smart card interface IC has an internal 10 ms delay at power-on reset or upon application
of VDD > VDDF
1.
CMDVCC is set low.
or upon exit of Power Down mode. The card interface may only be activated when
OFF is
high which indicates a card is present. No activation is allowed at this time.
CMDVCC (edge triggered)
must then be set low to activate the card.
The following steps list the activation sequence and the timing of the card control signals when the
system controller sets
CMDVCC low while the RSTIN is low:
2.
Next, the internal VCC control circuit checks the presence of VCC at the end of t1. In normal operation,
the voltage VCC to the card becomes valid during t1. If VCC does not become valid, then OFF goes
low to report a fault to the system controller, and the power VCC
3.
Turn I/O (AUX1, AUX2) to reception mode at the end of t
to the card is turned off.
2
4.
CLK is applied to the card at the end of t
.
3
5.
RST is a copy of RSTIN after t
.
4. RSTIN may be set high before t 4, however the sequencer won’t set
RST high until 42000 clock cycles after the start of CLK.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 73S8023C-IMR/F | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8023C-IMR/F1 | 功能描述:輸入/輸出控制器接口集成電路 RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8023C-IMR/F2 | 功能描述:輸入/輸出控制器接口集成電路 RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8023C-IMR/F3 | 功能描述:輸入/輸出控制器接口集成電路 Smart Card Interface ISO7816-3 & EVM4.0 RoHS:否 制造商:Silicon Labs 產(chǎn)品: 輸入/輸出端數(shù)量: 工作電源電壓: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-64 封裝:Tray |
| 73S8024C-DB | 功能描述:界面開發(fā)工具 73S8024C Demo Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V |
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