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參數(shù)資料
| 型號(hào)： | 7026S55J8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 16K X 16 DUAL-PORT SRAM, 55 ns, PQCC84 |
| 封裝： | PLASTIC, LCC-84 |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 272K |
| 代理商： | 7026S55J8 |
6.42
IDT7026S/L
High-Speed 16K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
10
Timing Waveform of Write Cycle No. 1, R/W Controlled Timing(1,5,8)
NOTES:
1. R/W or CE or UB and LB = VIH during all address transitions.
2. A write occurs during the overlap (tEW or tWP) of a VIL CE = VIL and R/W = VIL for memory array writing cycle.
3. tWR is measured from the earlier of CE or R/W (or SEM or R/W) going VIH to the end of write cycle.
4. During this period, the I/O pins are in the output state and input signals must not be applied.
5. If the CE or SEM = VIL transition occurs simultaneously with or after the R/W = VIL transition, the outputs remain in the High-impedance state.
6. Timing depends on which enable signal is asserted last, CE or R/W.
7. This parameter is guaranteed by device characterization, but is not production tested. Transition is measured 0mV from steady state with the Output Test Load (Figure
2).
8. If OE = VIL during R/W controlled write cycle, the write pulse width must be the larger of tWP or (tWZ + tDW) to allow the I/O drivers to turn off and data to be placed
on the bus for the required tDW. If OE = VIH during an R/W controlled write cycle, this requirement does not apply and the write pulse can be as short as the
specified tWP.
9. To access RAM, CE = VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL. tEW must be met for either condition.
Timing Waveform of Write Cycle No. 2, CE, UB, LB Controlled Timing(1,5)
R/
W
tWC
tHZ
tAW
tWR
tAS
tWP
DATAOUT
(2)
tWZ
tDW
tDH
tOW
OE
ADDRESS
DATAIN
(6)
(4)
(7)
UB or LB
2939 drw 08
(9)
CE or SEM
(9)
(7)
(3)
2939 drw 09
tWC
tAS
tWR
tDW
tDH
ADDRESS
DATAIN
R/
W
tAW
tEW
UB or LB
(3)
(2)
(6)
CE or SEM
(9)
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| 7026S55JI | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7026S55JI/2703 | 功能描述:IC SRAM 256KBIT 84PLCC 制造商:idt, integrated device technology inc 系列:* 零件狀態(tài):最後搶購 標(biāo)準(zhǔn)包裝:15 |
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| 7026SU | 制造商:Integrated Device Technology Inc 功能描述:70261 16KX16 256K, 5V DUAL-PORT RAM W/INT - Bulk |
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