參數(shù)資料
型號： 5962H0521402VXX
元件分類： XO, clock
英文描述： 200 MHz, OTHER CLOCK GENERATOR, CDFP48
封裝： CERAMIC, DFP-48
文件頁數(shù)： 19/23頁
文件大小： 174K
代理商： 5962H0521402VXX
5
IN
DEVELOPMENT
Notes:
1. nF[1:0] = LL disables bank specific outputs if TEST=MID and sOE = HIGH.
2. When TEST=MID or HIGH, the Divide-by-2, Divide-by-4, and Inversion-
options function as defined in Table 9.
3. When 4Q[1:0] are set to run inverted (4F[1:0] = HH), sOE disables these out-
puts HIGH when PE/HD = HIGH or MID, sOE disables them LOW when
PE/HD = LOW.
A graphical summary of Table 10 is shown in Figure 3. The
drawing assumes that the FB input is driven by a clock output
programmed with zero skew. Depending upon the state of the
nF[1:0] pins the respective clocks will be skewed, divided, or
inverted relative to the fedback output as shown in Figure 3.
1.3 Output Drive, Synchronization, and Power Supplies:
The UT7R995/C employs flexible output buffers providing the
user with selectable drive strengths, independent power sup-
plies, and synchronization to either edge of the reference input.
Using the 3-level PE/HD pin, the user selects the reference edge
synchronization and the output drive strength for all clock out-
puts. The options for edge synchronization and output drive
strength selected by the PE/HD pin are listed in Table 11.
Notes:
1. Please refer to "DC Parameters" section for IOH/IOL specifications.
Table 10: Output Skew Settings
nF[1:0]
Skew
1Q[1:0], 2Q[1:0]
Skew
3Q[1:0]
Skew
4Q[1:0]
LL 1, 2
-4tU
Divide by 2
LM
-3tU
-6tU
LH
-2tU
-4tU
ML
-1tU
-2tU
MM
Zero Skew
MH
+1tU
+2tU
HL
+2tU
+4tU
HM
+3tU
+6tU
HH 2
+4tU
Divide by 4
Inverted 3
Table 11: PE/HD Settings
PE/HD
Synchronization
Output Drive
Strength 1
L
Negative
Low Drive
M
Positive
High Drive
H
Positive
Low Drive
t 0
-
6t
U
t 0
-
5t
U
t 0
-
3t
U
t 0
-
1t
U
t 0
+
1t
U
t 0
+
2t
U
t 0
+
3t
U
t 0
+
4t
U
t 0
+
5t
U
t 0
+
6t
U
t 0
-
4t
U
t 0
-
2t
U
XTAL1 Input
FB Input
-6tU
+2tU
+3tU
+4tU
+6tU
DIVIDED
-4tU
-3tU
-2tU
-1tU
0tU
+1tU
INVERTED
1F[1:0]
2F[1:0]
3F[1:0]
4F[1:0]
(N/A)
LM
LL
LH
LM
(N/A)
LH
ML
(N/A)
MM
MH
(N/A)
HL
MH
HM
(N/A)
HH
HL
(N/A)
HM
(N/A)
LL/HH
LL
(N/A)
HH
Figure 3. Typical Outputs with FB Connected to a Zero-Skewed Output
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