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參數(shù)資料
| 型號： | 5962F0521404VXA |
| 元件分類： | XO, clock |
| 英文描述： | 200 MHz, OTHER CLOCK GENERATOR, CDFP48 |
| 封裝： | CERAMIC, DFP-48 |
| 文件頁數(shù)： | 4/22頁 |
| 文件大?。?/td> | 174K |
| 代理商： | 5962F0521404VXA |
12
7.0 DC OUTPUT ELECTRICAL CHARACTERISTICS (Pre- and Post-Radiation)*
(VDDQn = +2.5V + 10%; VDD = +3.3V + 0.3V; TC = -55°C to +125°C) (For "W" screening, TC = -40°C to +125°C) (Note 1)
Notes: * Post-radiation performance guaranteed at 25
°C per MIL-STD-883 Method 1019, Condition A up to a TID level of 1.0E6 rad(Si).
1. Unless otherwise noted, these tests are performed with VDD and VDDQn at their minimum levels.
2. Supplied as a design limit. Neither guaranteed nor tested.
3. When measuring the dynamic supply current, all outputs are loaded in accordance with the equivalent test load defined in figure 10.
4. Capacitance is measured for initial qualification and when design changes may affect the input/output capacitance. Capacitance is measured between the designated
terminal and VSS at a frequency of 1MHz and a signal amplitude of 50mV rms maximum.
5. For the UT7R995, the 200MHz test condition is based on an XTAL1 frequency of 200MHz. For the UT7R995C, the 200MHz test condition is based on an XTAL1
frequency of 16.666667MHz, and a N-divider setting of 12.
6. To reduce power consumption for the device, the user may tie the unused VDDQn pins to VSS.
Symbol
Description
Conditions
Min.
Max.
Units
VOL
Output low voltage
IOL = 12mA (PE/HD = LOW or HIGH); (Pins: nQ[1:0])
--
0.4
V
IOL = 20mA (PE/HD = MID); (Pins: nQ[1:0])
--
0.4
V
IOL = 2mA (Pins: LOCK)
--
0.4
V
IOH = -6mA (PE/HD=LOWorHIGH); (Pins: nQ[1:0]; VDDQn =
+2.25V)
2.0
--
V
VOH
High-level output
voltage
IOH = -10mA (PE/HD=LOWor HIGH); (Pins: nQ[1:0]; VDDQn
= +2.375V)
2.0
--
V
IOH = -10mA (PE/HD = MID); (Pins: nQ[1:0]; VDDQn = +2.25V)
2.0
--
V
IOH = -20mA (PE/HD = MID); (Pins: nQ[1:0]; VDDQn =
+2.375V)
2.0
--
V
IOH = -2mA (Pins: LOCK)
2.4
--
V
IOSQn
2
Short-circuit output
current
VO = VDDQn or VSS; VDDQn = +2.75V; PE/HD = MID
-500
500
mA
VO = VDDQn or VSS; VDDQn = +2.75V; PE/HD = LOW or HIGH
-300
300
mA
I
DDOP
3,5,6
Dynamic supply
current
@200MHz (FS = HIGH); VDD = Max;
VDDQn = +2.75V; CL = 20pF/output
UT7R995
--
200
mA
UT7R995C
--
280
mA
@50MHz (FS = LOW); VDD = Max;
VDDQn = +2.75V; CL = 20pF/output
UT7R995
--
130
mA
UT7R995C
--
145
mA
COUT
4
Output pin capacitance
f = 1MHz @ 0V; VDD = Max; VDDQn = +2.75V
15
pF
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