
DS17485/DS17487 
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possible interrupt sources has its flag and enable bits both set. The IRQF bit in Register C is a 1 whenever 
the 
IRQ
 pin is being driven low as a result of one of the six possible active sources. Therefore, 
determination that the DS17485/DS17487 initiated an interrupt is accomplished by reading Register C 
and finding IRQF = 1. IRQF remains set until all enabled interrupt flag bits are cleared to 0. 
OSCILLATOR CONTROL BITS 
When the DS17487 is shipped from the factory, the internal oscillator is turned off. This feature prevents 
the lithium energy cell from being used until it is installed in a system. A pattern of 01X in bits 4 through 
6 of Register A turns the oscillator on and enable the countdown chain. Not that this is different than the 
dS1287, which required a pattern of 010 in these bits. DV0 is now a “don’t care” because it is used for 
selection between register banks 0 and 1. A pattern of 11X turns the oscillator on, but holds the 
countdown chain of the oscillator in reset. All other combinations of bits 4 through 6 keep the oscillator 
off. 
SQUARE-WAVE OUTPUT SELECTION 
The SQW pin can be programmed to output a variety of frequencies divided down from the 32.768kHz 
crystal tied to X1 and X2. The square-wave output is enabled and disabled through the SQWE bit in 
Register B or the E32k bit in extended register 4Bh. If the square wave is enabled (SQWE = 1 or  
E32k = 1), then the output frequency is determined by the settings of the E32k bit in Extended Register 
4Bh and by the RS3–0 bits in Register A. If E32k = 1, then a 32.768kHz square wave is output on the 
SQW pin regardless of the settings of RS3–0 and SQWE. 
If E32k = 0, then the square-wave output frequency is determined by the RS3–0 bits. These bits control a 
1-of-15 decoder that selects one of 13 taps that divide the 32.768kHz frequency. The RS3–0 bits establish 
the SQW output frequency as shown in Table 2. In addition, RS3–0 bits control the periodic interrupt 
selection as described below. 
If E32k = 1, and the auxiliary-battery-enable bit (ABE, bank 1; register 04BH) is enabled, and voltage is 
applied to V
BAUX
, then the 32kHz square-wave output signal is output on the SQW pin in the absence of 
V
CC
. This facility is provided to clock external power-management circuitry. If any of the above 
requirements are not met, no square-wave output signal is generated on the SQW pin in the absence of 
V
CC
. 
PERIODIC INTERRUPT SELECTION 
The periodic interrupt causes the 
IRQ
 pin to go to an active state from once every 500ms to once every 
122μs. This function is separate from the alarm interrupt, which can be output from once per second to 
once per day. The periodic interrupt rate is selected using the same RS3–0 bits in Register A, which select 
the square-wave frequency (Table 2). Changing the bits affects both the square-wave frequency and the 
periodic-interrupt output. However, each function has a separate enable bit in Register B. The SQWE and 
E32k bits control the square-wave output. Similarly, the PIE bit in Register B enables the periodic 
interrupt. The periodic interrupt can be used with software counters to measure inputs, create output 
intervals, or await the next needed software function.