參數(shù)資料
型號: 25C040EN
元件分類: EEPROM
英文描述: EEPROM
中文描述: EEPROM的
文件頁數(shù): 10/12頁
文件大小: 160K
代理商: 25C040EN
25AA040/25LC040/25C040
DS21204B-page 10
1998 Microchip Technology Inc.
3.7
Data Protection
The following protection has been implemented to pre-
vent inadvertent writes to the array:
The write enable latch is reset on power-up.
A write enable instruction must be issued to set
the write enable latch.
After a byte write, page write, or status register
write, the write enable latch is reset.
CS must be set high after the proper number of
clock cycles to start an internal write cycle.
Access to the array during an internal write cycle
is ignored and programming is continued.
The write enable latch is reset when the WP pin is
low.
3.8
Power On State
The 25xx040 powers on in the following state:
The device is in low power standby mode
(CS=1).
The write enable latch is reset.
SO is in high impedance state.
A low level on CS is required to enter active state.
.
TABLE 3-10:
WRITE PROTECT FUNCTIONALITY MATRIX
WP
WEL
Protected Blocks
Unprotected Blocks
Status Register
Low
High
High
X
0
1
Protected
Protected
Protected
Protected
Protected
Writable
Protected
Protected
Writable
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參數(shù)描述
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