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參數(shù)資料
| 型號： | 100351 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Low Power Hex D Flip-Flop |
| 中文描述： | 六角低功耗D觸發(fā)器 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 147K |
| 代理商： | 100351 |
100351
Low Power Hex D Flip-Flop
General Description
The 100351 contains six D-type edge-triggered, master/
slave flip-flops with true and complement outputs, a pair of
common Clock inputs (CP
and CP
) and common Master
Reset (MR) input. Data enters a master when both CP
and
CP
are LOW and transfers to the slave when CP
and CP
b
(or both) go HIGH. The MR input overrides all other inputs
and makes the Q outputs LOW. All inputs have 50 k
pull-down resistors.
Features
n
40% power reduction of the 100151
n
2000V ESD protection
n
Pin/function compatible with 100151
n
Voltage compensated operating range:
4.2V to 5.7V
n
Standard Microcircuit Drawing
(SMD) 5962-9457901
Logic Symbol
Pin Names
D
0
–D
5
CP
a
, CP
b
MR
Q
0
–Q
5
Q
0
–Q
5
Description
Data Inputs
Common Clock Inputs
Asynchronous Master Reset Input
Data Outputs
Complementary Data Outputs
DS100318-11
August 1998
1
1998 National Semiconductor Corporation
DS100318
www.national.com
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 100351D | Low Power Hex D Flip-Flop |
| 100351F | Low Power Hex D Flip-Flop |
| 100351QC | Low Power Hex D-Type Flip-Flop |
| 100351QI | Low Power Hex D-Type Flip-Flop |
| 100351 | Low Power Hex D-Type Flip-Flop |
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